Fan-out structure and method of fabricating the same

• US 10,643,864 B2
• Filed: 05/20/2019
• Issued: 05/05/2020
• Est. Priority Date: 12/15/2016
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Yu, Chen-Hua, Su, An-Jhih, Wu, Chi-Hsi, Yeh, Der-Chyang, Chen, Hsien-Wei, Chen, Wei-Yu
• Primary Examiner(s): Gumedzoe, Peniel M
• Application Number:
  US16/416,432
• Publication Number:
  US 20190273001A1
• Time in Patent Office: 351 Days
• CPC Class Codes: H01L 21/486 Via connections through the substrate with or without pins
• CPC Class Codes: H01L 21/561 Batch processing
• CPC Class Codes: H01L 21/568 Temporary substrate used as encapsulation process aid H01L21/4832 and H01L21/566 take precedence
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 2221/68345 used as a support during the manufacture of self supporting substrates
• CPC Class Codes: H01L 2221/68359 used as a support during manufacture of interconnect decals or build up layers
• CPC Class Codes: H01L 2224/04105 Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
• CPC Class Codes: H01L 2224/12105 Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
• CPC Class Codes: H01L 2224/18 High density interconnect [HDI] connectors; Manufacturing methods related thereto
• CPC Class Codes: H01L 2224/73267 Layer and HDI connectors
• CPC Class Codes: H01L 2224/92244 the second connecting process involving a build-up interconnect
• CPC Class Codes: H01L 2225/1035 the device being entirely enclosed by the support, e.g. high-density interconnect [HDI]
• CPC Class Codes: H01L 2225/1058 Bump or bump-like electrical connections, e.g. balls, pillars, posts
• CPC Class Codes: H01L 23/3128 the substrate having spherical bumps for external connection
• CPC Class Codes: H01L 23/49503 characterised by the die pad
• CPC Class Codes: H01L 23/49816 Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 23/49838 Geometry or layout
• CPC Class Codes: H01L 23/5383 Multilayer substrates H01L23/5385 takes precedence; multilayer metallisation on monolayer substrates H01L23/538
• CPC Class Codes: H01L 23/5384 Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors H01L23/5383, H01L23/5385 take precedence; pins attached to insulating substrates H01L23/49811
• CPC Class Codes: H01L 23/5389 the chips being integrally enclosed by the interconnect and support structures
• CPC Class Codes: H01L 24/19 : Manufacturing methods of high density interconnect preforms
• CPC Class Codes: H01L 24/20 : Structure, shape, material or disposition of high density interconnect preforms
• CPC Class Codes: H01L 24/28 : Structure, shape, material or disposition of the layer connectors prior to the connecting process
• CPC Class Codes: H01L 25/105 : the devices being of a type provided for in group H01L27/00
• CPC Class Codes: H01L 25/18 : the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/1203 : Rectifying Diode
• CPC Class Codes: H01L 2924/1304 : Transistor
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/18162 : of a chip with build-up interconnect
• CPC Class Codes: H01L 2924/3511 : Warping

Abstract

A semiconductor device includes a first die extending through a molding compound layer, a first dummy die having a bottom embedded in the molding compound layer, wherein a height of the first die is greater than a height of the first dummy die, and an interconnect structure over the molding compound layer, wherein a first metal feature of the interconnect structure is electrically connected to the first die and a second metal feature of the interconnect structure is over the first dummy die and extends over a sidewall of the first dummy die.

Claims

1. A device comprising:

a first die and a first dummy die in a molding compound layer, wherein;

the first die comprises a substrate and an interconnect portion; and

a height of the first die is greater than a height of the first dummy die; and

an interconnect structure over the molding compound layer, wherein;

a metal feature of the interconnect portion of the first die is in contact with a first metal feature of the interconnect structure; and

a second metal feature of the interconnect structure and the first dummy die are separated by the molding compound layer, and wherein the second metal feature laterally overlaps a sidewall of the first dummy die.

2. The device of claim 1, wherein:

the first die is a semiconductor die comprising a plurality of active circuits; and

the first dummy die is free of any active circuits.

3. The device of claim 1, wherein:

a height of the substrate is substantially equal to the height of the first dummy die.

4. The device of claim 1, wherein:

the first metal feature of the interconnect structure is a metal line.

5. The device of claim 4, wherein:

the metal line is in direct contact with a first terminal of a via; and

a second terminal of the via is in direct contact with the metal feature of the interconnect portion of the first die.

6. The device of claim 1, further comprising:

a length of the first die is substantially equal to a length of the first dummy die.

7. The device of claim 1, wherein:

a top surface of the first metal feature of the interconnect structure is level with a top surface of the second metal feature of the interconnect structure.

8. The device of claim 1, wherein:

the metal feature of the interconnect portion of the first die is a contact pad.

9. The device of claim 1, further comprising:

a plurality of bumps over the interconnect structure.

10. The device of claim 1, wherein:

a first side of the first die is exposed outside the molding compound layer; and

a second side of the first die in direct contact with the interconnect structure.

11. A device comprising:

a first die extending through a molding compound layer;

a first dummy die having a bottom embedded in the molding compound layer, wherein a height of the first die is greater than a height of the first dummy die; and

an interconnect structure over the molding compound layer, wherein;

a first metal feature of the interconnect structure is electrically connected to the first die; and

a second metal feature of the interconnect structure is over the first dummy die and extends over a sidewall of the first dummy die.

12. The device of claim 11, further comprising:

a first dielectric layer on and in direct contact with the molding compound layer.

13. The device of claim 12, wherein:

a via is in the first dielectric layer, and wherein the first metal feature of the interconnect structure is electrically connected to the first die through the via.

14. The device of claim 12, further comprising:

a second dielectric layer on and in direct contact with the first dielectric layer.

15. The device of claim 14, wherein:

the first metal feature and the second metal feature are in the second dielectric layer.

16. An apparatus comprising:

a first die having a substrate portion and an interconnect portion;

a first dummy die having a thickness substantially equal to a thickness of the substrate portion of the first die; and

an interconnect structure in contact with the interconnect portion of the first die, wherein;

a first metal feature of the interconnect structure is in direct contact with a metal feature of the interconnect portion of the first die; and

a second metal feature of the interconnect structure is over the first dummy die and extends beyond a sidewall of the first dummy die.

17. The apparatus of claim 16, further comprising:

a molding compound layer, wherein the first die and the first dummy die are in the molding compound layer.

18. The apparatus of claim 17, further comprising:

a dielectric layer on and in direct contact with the molding compound layer.

19. The apparatus of claim 18, wherein:

the first metal feature comprises a metal line portion and a via portion, and wherein the via portion extends through the dielectric layer.

20. The apparatus of claim 18, wherein:

the dielectric layer comprises a first portion over the first die and a second portion over the first dummy die, and wherein the second portion of the dielectric layer is free of conductive elements.