Method of forming a semiconductor device

• US 10,643,897 B2
• Filed: 01/12/2017
• Issued: 05/05/2020
• Est. Priority Date: 01/14/2016
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Rupp, Roland, Santos Rodriguez, Francisco Javier, Schulze, Hans-Joachim
• Primary Examiner(s): Choudhry, Mohammad M
• Application Number:
  US15/404,400
• Publication Number:
  US 20170207124A1
• Time in Patent Office: 1,209 Days
• Field of Search: 438463
• CPC Class Codes: H01L 21/02002 Preparing wafers
• CPC Class Codes: H01L 21/265 producing ion implantation
• CPC Class Codes: H01L 21/268 using electromagnetic radiation, e.g. laser radiation
• CPC Class Codes: H01L 21/322 to modify their internal properties, e.g. to produce internal imperfections
• CPC Class Codes: H01L 21/7806 involving the separation of the active layers from a substrate
• CPC Class Codes: H01L 29/0834 Anode regions of thyristors or gated bipolar-mode devices, e.g. supplementary regions surrounding anode regions
• CPC Class Codes: H01L 29/1608 Silicon carbide
• CPC Class Codes: H01L 29/32 the imperfections being within the semiconductor body
• CPC Class Codes: H01L 29/66068 the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
• CPC Class Codes: H01L 29/66333 Vertical insulated gate bipolar transistors
• CPC Class Codes: H01L 29/66348 with a recessed gate
• CPC Class Codes: H01L 29/7397 and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
• CPC Class Codes: H01L 29/8611 Planar PN junction diodes

Abstract

Methods of forming a semiconductor device are provided. A method includes introducing impurities into a part of a semiconductor substrate at a first surface of the semiconductor substrate by ion implantation, the impurities being configured to absorb electromagnetic radiation of an energy smaller than a bandgap energy of the semiconductor substrate. The method further includes forming a semiconductor layer on the first surface of the semiconductor substrate. The method further includes irradiating the semiconductor substrate with electromagnetic radiation configured to be absorbed by the impurities and configured to generate local damage of a crystal lattice of the semiconductor substrate. The method further includes separating the semiconductor layer and the semiconductor substrate by thermal processing of the semiconductor substrate and the semiconductor layer, where the thermal processing is configured to cause crack formation along the local damage of the crystal lattice by thermo-mechanical stress.

Claims

1. A method of forming a semiconductor device, the method comprising:

forming a semiconductor layer on a first surface of a semiconductor substrate, wherein impurities are introduced into a first sub-layer adjoining the semiconductor substrate at the first surface of the semiconductor substrate, the impurities being configured to absorb electromagnetic radiation of an energy smaller than a bandgap energy of the semiconductor substrate;

irradiating the semiconductor substrate with electromagnetic radiation, the electromagnetic radiation being absorbed by the impurities thereby generating a local damage of a crystal lattice of the semiconductor substrate; and

subsequent to and independent from irradiating the semiconductor substrate with the electromagnetic radiation, applying thermal processing to the semiconductor substrate and the semiconductor layer, including at the local damage, to regulate a temperature thereof, wherein the thermal processing is configured to cause a crack formation along the local damage of the crystal lattice by thermo-mechanical stress; and

separating the semiconductor layer and the semiconductor substrate by the thermal processing of the semiconductor substrate and the semiconductor layer.

21. The method of claim 1, wherein the semiconductor layer includes a drift layer, the method further comprising:

forming a semiconductor device element at least partly at the drift layer of the semiconductor layer.

25. The method of claim 1, wherein the thermal processing is applied from outside the semiconductor substrate and the semiconductor layer, independent of the electromagnetic radiation, to induce a temperature change at the local damage.

26. The method of claim 25, wherein the thermal processing includes a cooling process for introducing the thermo-mechanical stress to cause the crack formation.

27. The method of claim 25, wherein the thermal processing includes a heating process for introducing the thermo-mechanical stress to cause the crack formation.

2. A method of forming a semiconductor device, the method comprising:

introducing impurities into a part of a semiconductor substrate at a first surface of the semiconductor substrate by ion implantation, the impurities being configured to absorb electromagnetic radiation of an energy smaller than a bandgap energy of the semiconductor substrate;

forming a semiconductor layer on the first surface of the semiconductor substrate;

irradiating the semiconductor substrate with electromagnetic radiation, the electromagnetic radiation being absorbed by the impurities thereby generating a local damage of a crystal lattice of the semiconductor substrate; and

subsequent to and independent from irradiating the semiconductor substrate with the electromagnetic radiation, applying thermal processing to the semiconductor substrate and the semiconductor layer, including at the local damage, to regulate a temperature thereof, wherein the thermal processing is configured to cause a crack formation along the local damage of the crystal lattice by thermo-mechanical stress; and

separating the semiconductor layer and the semiconductor substrate by the thermal processing of the semiconductor substrate and the semiconductor layer.

3. The method of claim 2, wherein the electromagnetic radiation is laser light.

4. The method of claim 2, wherein an energy density of the electromagnetic radiation is in a range of 1 J/cm2 and 5 J/cm2.

5. The method of claim 2, wherein an extension of the impurities along a vertical direction between opposite surfaces of the semiconductor substrate is in a range of 100 nm to 3 μ

m.

6. The method of claim 2, wherein a dose of the impurities is in a range of 1×

1013 cm-2 to a crystal lattice amorphisation dose.

7. The method of claim 2, wherein the semiconductor layer is a silicon semiconductor layer and the impurities are selected from the group of nitrogen, molybdenum, tungsten, tantalum, indium and any combination thereof.

8. The method of claim 2, wherein the semiconductor layer is a silicon carbide semiconductor layer and the impurities are selected from the group of titanium, tantalum, vanadium and any combination thereof.

9. The method of claim 2, wherein the impurities are deep impurities having a distance to a closest bandgap of more than 100 meV.

10. The method of claim 2, further comprising maintaining the impurities as recombination centers in a recombination zone of the semiconductor device.

11. The method of claim 2, further comprising reducing a thickness of the semiconductor substrate by removal of material of the semiconductor substrate prior to irradiating the semiconductor substrate with the electromagnetic radiation configured to be absorbed by the impurities and configured to generate the local damage of the crystal lattice of the semiconductor substrate.

12. The method of claim 11, wherein the thickness is reduced only in the part of the semiconductor substrate.

13. The method of claim 2, wherein forming the semiconductor layer comprises forming a contact layer or an emitter layer on a semiconductor region comprising the impurities, and forming a drift zone layer on the contact layer or the emitter layer, wherein a maximum doping concentration of the contact layer or the emitter layer exceeds a maximum doping concentration of the drift zone layer by more than two orders of magnitude.

14. The method of claim 2, further comprising, after separating the semiconductor layer and the semiconductor substrate, forming a doped contact layer or a doped emitter layer at a surface of the semiconductor layer exposed by separating the semiconductor layer and the semiconductor substrate.

15. The method of claim 2, further comprising, prior to separating the semiconductor layer and the semiconductor substrate by thermal processing or prior to irradiating the semiconductor substrate with electromagnetic radiation, forming semiconductor device elements in and/or on the semiconductor layer.

16. The method of claim 2, further comprising, after separating the semiconductor layer and the semiconductor substrate by thermal processing, preparing a surface of the semiconductor substrate, exposed by separating the semiconductor layer and the semiconductor substrate, for reuse as a base substrate.

17. The method of claim 2, further comprising, prior to separating the semiconductor layer and the semiconductor substrate, mounting the semiconductor layer on a carrier.

18. The method of claim 2, wherein the semiconductor device is a vertical power semiconductor device, and the method further comprises:

forming a first load terminal and a control terminal at a first surface of the semiconductor layer; and

forming a second load terminal at a second surface of the semiconductor layer opposite to the first surface of the semiconductor layer.

19. The method of claim 2, further comprising cutting a ring structure in the semiconductor substrate from a second surface of the semiconductor substrate, and wherein the semiconductor layer and the semiconductor substrate are separated only within an inner area of the ring structure.

20. The method of claim 19, further comprising reducing a thickness of the semiconductor substrate by removal of a material of the semiconductor substrate within the inner area of the ring structure.

22. The method of claim 2, wherein the semiconductor layer includes a drift layer, the method further comprising:

forming a semiconductor device element at least partly at the drift layer of the semiconductor layer.

23. The method of claim 22, wherein the semiconductor device element is formed prior to separating the semiconductor layer and the semiconductor substrate by thermal processing.

24. The method of claim 22, wherein the semiconductor layer includes a first surface coupled to the first surface of the semiconductor substrate and a second surface opposite to the first surface of the semiconductor layer, the second surface of the semiconductor layer being a surface of the drift layer, and the semiconductor device element is formed at least partially at the second surface of the semiconductor layer.

28. The method of claim 2, wherein the thermal processing is applied from outside the semiconductor substrate and the semiconductor layer, independent of the electromagnetic radiation, to induce a temperature change at the local damage.

29. The method of claim 28, wherein the thermal processing includes a cooling process for introducing the thermo-mechanical stress to cause the crack formation.

30. The method of claim 28, wherein the thermal processing includes a heating process for introducing the thermo-mechanical stress to cause the crack formation.