Transistor array and manufacturing method thereof

• US 10,644,063 B2
• Filed: 12/12/2013
• Issued: 05/05/2020
• Est. Priority Date: 01/11/2013
• Status: Active Grant

• Current Assignee: Beijing Institute of Nanoenergy and Nanosystems
• Original Assignee: Beijing Institute of Nanoenergy and Nanosystems
• Inventors: Wang, Zhonglin, Wu, Wenzhuo, Wen, Xiaonan
• Primary Examiner(s): Reames, Matthew L
• Assistant Examiner(s): Bodnar, John A
• Application Number:
  US14/759,843
• Publication Number:
  US 20150357374A1
• Time in Patent Office: 2,336 Days
• CPC Class Codes: G01L 1/16 using properties of piezoelectric devices
• CPC Class Codes: G01L 9/08 by making use of piezoelectric devices , i.e. electric circuits therefor
• CPC Class Codes: H01L 29/78 with field effect produced by an insulated gate H01L29/7725, H01L29/775, H01L29/778 take precedence
• CPC Class Codes: H10N 30/01 Manufacture or treatment
• CPC Class Codes: H10N 30/06 Forming electrodes or interconnections, e.g. leads or terminals
• CPC Class Codes: H10N 30/077 by liquid phase deposition
• CPC Class Codes: H10N 30/302 Sensors
• CPC Class Codes: H10N 30/853 Ceramic compositions
• CPC Class Codes: H10N 30/8554 Lead-zirconium titanate [PZT] based
• CPC Class Codes: H10N 30/857 Macromolecular compositions
• CPC Class Codes: H10N 30/877 Conductive materials
• CPC Class Codes: H10N 30/883 Additional insulation means preventing electrical, physical or chemical damage, e.g. protective coatings
• CPC Class Codes: H10N 39/00 Integrated devices, or assemblies of multiple devices, comprising at least one piezoelectric, electrostrictive or magnetostrictive element covered by groups H10N30/00 – H10N35/00

Abstract

The disclosure provides a transistor array including a substrate and a plurality of transistor elements sharing the substrate. Each of the transistor elements includes: a bottom electrode disposed on the substrate and a connection wire for the bottom electrode; a piezoelectric body disposed on the bottom electrode, wherein the piezoelectric body is made of piezoelectric material; and a top electrode disposed on the piezoelectric body. The disclosure also provides a method for manufacturing a transistor array. The transistor array contains transistor elements which are two-terminal devices. Piezoelectric bodies with piezoelectric properties are provided between the top electrodes and bottom electrodes of the transistor array. The carrier transport progress of the transistor elements in the transistor array device can be effectively regulated or triggered by strains or stresses applied on the transistor elements.

Claims

1. A piezoelectric array comprising a substrate and a plurality of piezoelectric elements sharing the substrate, each of the piezoelectric elements including:

an individual bottom electrode formed of a first material disposed on the substrate and a connection wire for the bottom electrode;

a piezoelectric body disposed on the bottom electrode, wherein the piezoelectric body is made of piezoelectric material; and

an individual top electrode formed of a second material disposed on the piezoelectric body,

wherein the piezoelectric body of each piezoelectric element is configured to deform when the respective piezoelectric element deforms under stresses, strains, or pressures applied to the piezoelectric array, thereby producing a positive piezoelectric potential at one end and a negative piezoelectric potential at the other end within the piezoelectric body, and the produced piezoelectric potentials regulate or trigger carrier transport progress of the piezoelectric elements, wherein a diameter of the piezoelectric body of each piezoelectric element ranges from hundreds of nanometers to several microns, and each piezoelectric body includes one or more nanowires or nanorods.

2. The piezoelectric array of claim 1, wherein the piezoelectric body of each piezoelectric element has a polarized orientation.

3. The piezoelectric array of claim 2, wherein the polarized orientation of the piezoelectric body of each piezoelectric element is substantially perpendicular to the surface of the substrate.

4. The piezoelectric array of claim 2, wherein the polarized orientations of the piezoelectric bodies of the piezoelectric elements in the piezoelectric array is substantially the same.

5. The piezoelectric array of claim 1, further comprising a flexible insulation layer between the piezoelectric elements, wherein at least the top electrodes of the piezoelectric elements are exposed on the upper surface of the flexible insulation layer.

6. The piezoelectric array of claim 5, wherein each of the piezoelectric elements further includes a connection wire for the top electrode, and wherein the connection wire is configured to connect the top electrode to an external element.

7. The piezoelectric array of claim 6, wherein the piezoelectric array further includes an encapsulation layer disposed on the flexible insulation layer and configured to encapsulate parts of the piezoelectric elements which are exposed on the upper surface of the flexible insulation layer.

8. The piezoelectric array of claim 1, wherein the piezoelectric body of each piezoelectric element includes a nanowire or a nanorod made of ZnO, GaN, CdS, InN, InGaN, CdTe, CdSe, ZnSnO₃, or lead zirconate titanate.

9. The piezoelectric array of claim 8, wherein an axial direction of the piezoelectric body is substantially perpendicular to the surface of the bottom electrode or the substrate.

10. The piezoelectric array of claim 1, wherein the cross-sectional area of each piezoelectric element is 25 μ

m² or less.

11. The piezoelectric array of claim 10, wherein the distance between two neighboring piezoelectric elements ranges from several microns to several millimeters.

12. The piezoelectric array of claim 1, wherein the piezoelectric elements are cylinders, quadrangular prisms, hexagonal prisms, or irregular poles whose axial directions are substantially perpendicular to the substrate.

13. The piezoelectric array of claim 1, wherein the piezoelectric bodies of the piezoelectric elements are made of the same piezoelectric material.

14. The piezoelectric array of claim 1, wherein the piezoelectric elements are identical.

15. The piezoelectric array of claim 1, wherein the top electrode and/or the bottom electrode of each piezoelectric element is made of a conductive oxide, graphene, or a Ag nanowire coating;

or one of Au, Ag, Pt, Al, Ni, Cu, Ti, Cr, Se, or an alloy thereof.

19. The piezoelectric array of claim 4, further comprising a flexible insulation layer between the piezoelectric elements, wherein the top electrodes of the piezoelectric elements are exposed on the upper surface of the flexible insulation layer.

20. The piezoelectric array of claim 1, wherein the substrate is polyethylene teraphthalate and the piezoelectric body of each piezoelectric element includes a nanowire or a nanorod made of ZnO.

16. A method for manufacturing a piezoelectric array, comprising:

providing a substrate;

manufacturing on the substrate a bottom electrode array including a plurality of bottom electrodes and connection wires for the bottom electrodes;

manufacturing on the bottom electrodes piezoelectric bodies, thereby forming a piezoelectric body array; and

manufacturing on the piezoelectric bodies top electrodes, thereby forming a top electrode array.

17. The method of claim 16, further comprising:

after manufacturing piezoelectric bodies on the bottom electrodes, manufacturing a flexible insulation layer between the piezoelectric bodies, wherein the top parts of the piezoelectric bodies outside the flexible insulation layer are exposed.

18. The method of claim 17, further comprising:

manufacturing connection wires for the top electrodes and electrically connecting the connection wires to the top electrodes.