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Logic chip including embedded magnetic tunnel junctions

  • US 10,644,064 B2
  • Filed: 04/20/2018
  • Issued: 05/05/2020
  • Est. Priority Date: 03/15/2013
  • Status: Active Grant
First Claim
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1. A magnetic random access memory structure, comprising:

  • a first material layer comprising tantalum;

    a second material layer on the first material layer, the second material layer comprising platinum and manganese;

    a third material layer on the second material layer, the third material layer comprising cobalt and iron;

    a fourth material layer on the third material layer, the fourth material layer comprising ruthenium;

    a fifth material layer on the fourth material layer, the fifth material layer comprising cobalt, iron and boron, the fifth material layer having a first lateral width;

    a tunnel barrier layer on the fifth material layer, the tunnel barrier layer comprising magnesium and oxygen;

    a sixth material layer on the tunnel barrier layer, the sixth material layer comprising cobalt, iron and boron, the sixth material layer having an uppermost surface;

    a seventh material layer above the sixth material layer, the seventh material layer comprising tantalum, and the seventh material layer having a second lateral width less than the first lateral width;

    a spacer along sidewalls of the seventh material layer, the spacer having a bottommost surface above the uppermost surface of the sixth material layer.

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