Three-dimensional (3D) metal-insulator-metal capacitor (MIMCAP) and method

• US 10,644,099 B1
• Filed: 10/24/2018
• Issued: 05/05/2020
• Est. Priority Date: 10/24/2018
• Status: Active Grant

• Current Assignee: Globalfoundries US Incorporated (GlobalFoundries, Inc.)
• Original Assignee: GlobalFoundries, Inc.
• Inventors: Seidel, Robert V., McKay, Thomas G., Bolom, Tibor
• Primary Examiner(s): Maldonado, Julio J
• Assistant Examiner(s): Mojaddedi, Omar F
• Application Number:
  US16/168,951
• Publication Number:
  US 20200135845A1
• Time in Patent Office: 559 Days
• CPC Class Codes: H01L 21/7681 involving one or more buried masks
• CPC Class Codes: H01L 21/76813 involving a partial via etch
• CPC Class Codes: H01L 21/7687 Thin films associated with contacts of capacitors
• CPC Class Codes: H01L 23/5223 Capacitor integral with wiring layers
• CPC Class Codes: H01L 23/5226 Via connections in a multilevel interconnection structure
• CPC Class Codes: H01L 28/75 comprising two or more layers, e.g. comprising a barrier layer and a metal layer
• CPC Class Codes: H01L 28/91 made by depositing layers, e.g. by depositing alternating conductive and insulating layers

Abstract

Disclosed are integrated circuit (IC) structure embodiments with a three-dimensional (3D) metal-insulator-metal capacitor (MIMCAP) in back-end-of-the-line (BEOL) metal levels. The MIMCAP includes a plurality of high aspect ratio trenches that extend through at least one relatively thick dielectric layer within the metal levels. Conformal layers of a metal, an insulator and another metal line the trenches and cover the top of the dielectric layer in the area of the MIMCAP. Different configurations for the bottom and top electrode contacts can be used including, for example, one configuration where the top electrode contact is a dual-damascene structure within an ultra-thick metal (UTM) level above the MIMCAP and another configuration where both the top and bottom electrode contacts are such dual-damascene structures. Also disclosed are method embodiments for forming IC structures with such a MIMCAP and these method embodiments can be readily integrated into current BEOL processing, including UTM-level dual-damascene processing.

Claims

1. An integrated circuit structure comprising:

a substrate; and

a metal level above the substrate and comprising;

a first dielectric layer;

a second dielectric layer on the first dielectric layer;

a metal-insulator-metal capacitor comprising;

trenches extending through the second dielectric layer and the first dielectric layer; and

a metal-insulator-metal stack comprising;

a first conformal metal layer on the second dielectric layer and lining the trenches;

a conformal insulator layer on the first conformal metal layer; and

a second conformal metal layer on the conformal insulator layer;

a third dielectric layer on the second conformal metal layer and filling the trenches;

a fourth dielectric layer comprising a conformal dielectric layer above and immediately adjacent to a top surface of the third dielectric layer and further extending laterally beyond the third dielectric layer and the metal-insulator-metal capacitor so as to be above and immediately adjacent to a top surface of the second dielectric layer;

a fifth dielectric layer on the fourth dielectric layer, wherein the fifth dielectric layer has a planar top surface, wherein a first portion of the fifth dielectric layer on the fourth dielectric layer opposite the third dielectric layer has a first thickness and wherein a second portion of the fifth dielectric layer on the fourth dielectric layer opposite the second dielectric layer has a second thickness that is greater than the first thickness; and

a top electrode contact that extends through the first portion of the fifth dielectric layer, the fourth dielectric layer and the third dielectric layer to a top surface of the second conformal metal layer.

2. The integrated circuit structure of claim 1,

wherein end walls of the first conformal metal layer, the conformal insulator layer, the second conformal metal layer and the third dielectric layer are vertically aligned,

wherein the fourth dielectric layer is positioned laterally immediately adjacent to the end walls,

wherein the integrated circuit structure further comprises a bottom electrode contact below the metal-insulator-metal capacitor, and

wherein a top surface of the bottom electrode contact is in contact with a bottom surface of the first conformal metal layer at a bottom of at least one of the trenches.

3. The integrated circuit structure of claim 2, wherein the top electrode contact comprises any one of the following:

a dual-damascene top electrode comprising;

a top electrode wire extending through the first portion of the fifth dielectric layer and the fourth dielectric layer such that a bottom of the top electrode wire is immediately adjacent to a top surface of the third dielectric layer; and

at least one top electrode via interconnect extending from the bottom of the top electrode wire through the third dielectric layer to the top surface of the second conformal metal layer; and

a wire top electrode contact extending through the first portion of the fifth dielectric layer, the fourth dielectric layer and the third dielectric layer to the top surface of the second conformal metal layer.

4. The integrated circuit structure of claim 1,

wherein end walls of the conformal insulator layer, the second conformal metal layer and the third dielectric layer are vertically aligned,

wherein an end portion of the first conformal metal layer extends laterally beyond the end walls of the conformal insulator layer, the second conformal metal layer, and the third dielectric layer,

wherein the fourth dielectric layer is positioned laterally immediately adjacent to the end walls and is further above and immediately adjacent to a top surface of the end portion of the first conformal metal layer,

wherein a third portion of the fifth dielectric layer on the fourth dielectric layer opposite the end portion of the first conformal metal layer has a third thickness that is between the first thickness and the second thickness,

wherein the metal level further comprises a dual-damascene bottom electrode contact comprising:

a bottom electrode wire extending through the third portion of the fifth dielectric layer such that top surfaces of the bottom electrode wire and the fifth dielectric layer are coplanar and such that a bottom of the bottom electrode wire is adjacent to a top surface of the fourth dielectric layer; and

at least one bottom electrode via interconnect extending from the bottom of the bottom electrode wire to the top surface of the end portion of the first conformal metal layer.

5. The integrated circuit structure of claim 1, wherein the metal level further comprises:

an additional dual-damascene interconnect structure comprising;

an additional wire extending through the second portion of the fifth dielectric layer and the fourth dielectric layer such that a bottom of the additional wire is immediately adjacent to the top surface of the second dielectric layer; and

at least one additional via interconnect extending from the bottom of the additional wire through the second dielectric layer and the first dielectric layer.

6. The integrated circuit structure of claim 5, further comprising a metal element below and contacted by the additional dual-damascene interconnect structure.

7. The integrated circuit structure of claim 1, wherein the trenches further extend through at least one additional dielectric layer below the first dielectric layer.

8. The integrated circuit structure of claim 1, wherein the metal level is a back-end-of-the-line metal level having a thickness of at least 3 μ

m.

9. An integrated circuit structure comprising:

a substrate; and

a metal level above the substrate and comprising;

a first dielectric layer;

a second dielectric layer on the first dielectric layer;

a metal-insulator-metal capacitor comprising;

trenches extending through the second dielectric layer and the first dielectric layer; and

a metal-insulator-metal stack comprising;

a first conformal metal layer on the second dielectric layer and lining the trenches;

a conformal insulator layer on the first conformal metal layer; and

a second conformal metal layer on the conformal insulator layer;

a third dielectric layer on the second conformal metal layer and filling the trenches, wherein end walls of the conformal insulator layer, the second conformal metal layer and the third dielectric layer are vertically aligned and wherein an end portion of the first conformal metal layer extends laterally beyond the end walls;

a fourth dielectric layer comprising a conformal dielectric layer above and immediately adjacent to a top surface of the third dielectric layer, positioned laterally immediately adjacent to the end walls, above and immediately adjacent to a top surface of the the end portion of the first conformal metal layer and further extending laterally beyond the metal-insulator-metal capacitor and onto a top surface of the second dielectric layer;

a fifth dielectric layer on the fourth dielectric layer, wherein the fifth dielectric layer has a planar top surface, wherein a first portion of the fifth dielectric layer on the fourth dielectric layer opposite the third dielectric layer has a first thickness, wherein a second portion of the fifth dielectric layer on the fourth dielectric layer opposite the second dielectric layer has a second thickness that is greater than the first thickness, and wherein a third portion of the fifth dielectric layer on the fourth dielectric layer opposite the end portion of the first conformal metal layer has a third thickness that is between the first thickness and the second thickness;

a top electrode contact extending through the first portion of the fifth dielectric layer, the fourth dielectric layer, and third dielectric layer to a top surface of the second conformal metal layer; and

a bottom electrode contact extending through the third portion of the fifth dielectric layer and the fourth dielectric layer to the top surface of the end portion of the first conformal metal layer, wherein top surfaces of the top electrode contact, the bottom electrode contact and the fifth dielectric layer are coplanar.

10. The integrated circuit structure of claim 9, wherein the metal level further comprises:

an additional dual-damascene interconnect structure comprising;

an additional wire extending through the second portion of the fifth dielectric layer and the fourth dielectric layer such that a bottom of the additional wire is adjacent to the top surface of the second dielectric layer; and

at least one additional via interconnect extending from the bottom of the additional wire through the second dielectric layer and the first dielectric layer to a metal element.

11. The integrated circuit structure of claim 10, wherein top surfaces of the fifth dielectric layer, the top electrode contact, the bottom electrode contact and the additional dual-damascene interconnect structure are co-planar.

12. The integrated circuit structure of claim 10, wherein the metal element comprises a metal wire.

13. The integrated circuit structure of claim 9, wherein the trenches further extend through at least one additional dielectric layer below the first dielectric layer.

14. The integrated circuit structure of claim 9, wherein the metal level is a back-end-of-the-line metal level having a thickness of at least 3 μ

m.

15. An integrated circuit structure comprising:

a substrate; and

a metal level above the substrate and comprising;

a first dielectric layer;

a second dielectric layer on the first dielectric layer;

a metal-insulator-metal capacitor comprising;

trenches extending through the second dielectric layer and the first dielectric layer; and

a metal-insulator-metal stack comprising;

a first conformal metal layer on the second dielectric layer and lining the trenches;

a conformal insulator layer on the first conformal metal layer; and

a second conformal metal layer on the conformal insulator layer;

a third dielectric layer on the second conformal metal layer and filling the trenches, wherein end walls of the conformal insulator layer, the second conformal metal layer and the third dielectric layer are vertically aligned and wherein an end portion of the first conformal metal layer extends laterally beyond the end walls;

a fourth dielectric layer comprising a conformal dielectric layer above and immediately adjacent to a top surface of the third dielectric layer, positioned laterally immediately adjacent to the end walls, above and immediately adjacent to a top surface of the end portion of the first conformal metal layer and further extending laterally beyond the metal-insulator-metal capacitor onto a top surface of the second dielectric layer;

a fifth dielectric layer on the fourth dielectric layer, wherein the fifth dielectric layer has a planar top surface, wherein a first portion of the fifth dielectric layer on the fourth dielectric layer opposite the third dielectric layer has a first thickness, wherein a second portion of the fifth dielectric layer on the fourth dielectric layer opposite the second dielectric layer has a second thickness that is greater than the first thickness, and wherein a third portion of the fifth dielectric layer on the fourth dielectric layer opposite the end portion of the first conformal metal layer has a third thickness that is between the first thickness and the second thickness;

a dual-damascene top electrode contact comprising;

a top electrode wire extending through the first portion of the fifth dielectric layer and into an upper portion of the fourth dielectric layer such that a bottom of the top electrode wire is above and physically separated from the top surface of the third dielectric layer; and

at least one top electrode via interconnect extending from the bottom of the top electrode wire through a lower portion of the fourth dielectric layer and further through the third dielectric layer to a top surface of the second conformal metal layer; and

a dual-damascene bottom electrode contact comprising;

a bottom electrode wire extending through the third portion of the fifth dielectric layer such that a bottom of the bottom electrode wire is adjacent to a top surface of the fourth dielectric layer; and

at least one bottom electrode via interconnect extending from the bottom of the bottom electrode wire through the fourth dielectric layer to the top surface of the end portion of the first conformal metal layer, wherein top surfaces of the dual-damascene top electrode contact, the dual-damascene bottom electrode contact and the fifth dielectric layer are coplanar.

16. The integrated circuit structure of claim 15, wherein the metal level further comprises:

an additional dual-damascene interconnect structure comprising;

an additional wire extending through the second portion of the fifth dielectric layer and the fourth dielectric layer such that a bottom of the additional wire is adjacent to the top surface of the second dielectric layer; and

at least one additional via interconnect extending from the bottom of the additional wire through the second dielectric layer and the first dielectric layer to a metal element.

17. The integrated circuit structure of claim 16, wherein top surfaces of the fifth dielectric layer, the dual-damascene top electrode contact, the dual-damascene bottom electrode contact and the additional dual-damascene interconnect structure are co-planar.

18. The integrated circuit structure of claim 16, wherein bottoms of the top electrode wire, the bottom electrode wire and the additional wire are all at different levels such that a height of the additional wire is greater than a height of the bottom electrode wire and the height of the bottom electrode wire is greater than a height of the top electrode wire.

19. The integrated circuit structure of claim 16, wherein the metal element comprises a metal wire.

20. The integrated circuit structure of claim 15, wherein the trenches further extend through at least one additional dielectric layer below the first dielectric layer.

21. The integrated circuit structure of claim 15, wherein the metal level is a back-end-of-the-line metal level having a thickness of at least 3 μ

m.