Vertical semiconductor device and method of manufacturing vertical semiconductor device

• US 10,644,147 B2
• Filed: 12/20/2018
• Issued: 05/05/2020
• Est. Priority Date: 02/28/2018
• Status: Active Grant

• Current Assignee: Fuji Electric Company Limited (Fuji Electric Systems Company Limited)
• Original Assignee: Fuji Electric Company Limited (Fuji Electric Systems Company Limited)
• Inventors: Ueno, Katsunori
• Primary Examiner(s): Arora, Ajay
• Application Number:
  US16/226,642
• Publication Number:
  US 20190267486A1
• Time in Patent Office: 502 Days
• Field of Search: 257330
• CPC Class Codes: H01L 29/0878 Impurity concentration or distribution
• CPC Class Codes: H01L 29/0886 Shape
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/1608 Silicon carbide
• CPC Class Codes: H01L 29/2003 Nitride compounds
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/66068 the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7806 the other device being a Schottky barrier diode
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/7827 Vertical transistors H01L29/7802, H01L29/78642 take precedence

Abstract

A vertical semiconductor device is provided, including a transistor region and a Schottky diode region, and having, in a gallium nitride layer in the Schottky diode region, a first well region, a diode trench portion that is provided in direct contact with the first well region in an array direction in which the transistor region and the Schottky diode region are arrayed, a first upper drift region that is connected to the bottom of the diode trench portion, a lower drift region that is connected to the bottom of the first well region and a bottom of the first upper drift region, and a conductive portion that is connected to an upper portion of the first upper drift region.

Claims

1. A vertical semiconductor device having a gallium nitride substrate of a first conductivity type and a gallium nitride layer provided on the gallium nitride substrate, the vertical semiconductor device comprising:

a transistor region; and

a Schottky diode region that is in direct contact with the transistor region, wherein

the vertical semiconductor device has, in the gallium nitride layer in the Schottky diode region;

a first well region of a second conductivity type;

a diode trench portion that is in direct contact with the first well region in an array direction in which the transistor region and the Schottky diode region are arrayed and that is provided from an upper surface of the gallium nitride layer to a position shallower than a bottom of the first well region;

a first upper drift region of a first conductivity type that is connected to a bottom of the diode trench portion;

a lower drift region of a first conductivity type that is connected to the bottom of the first well region and to a bottom of the first upper drift region; and

a conductive portion that is provided inside the diode trench portion and that is connected to an upper portion of the first upper drift region.

2. The vertical semiconductor device according to claim 1, wherein

the vertical semiconductor device has, in the gallium nitride layer in the transistor region:

a gate trench portion that is spaced from the diode trench portion in the array direction, that is in direct contact with the first well region and that is provided from the upper surface of the gallium nitride layer to a position shallower than the bottom of the first well region; and

a second upper drift region of a first conductivity type that is connected to a bottom of the gate trench portion, and

the lower drift region is also connected to a bottom of the second upper drift region.

3. The vertical semiconductor device according to claim 2, wherein

the bottom of the diode trench portion is provided, in a depth direction of the gallium nitride layer, at a position closer to the upper surface of the gallium nitride layer than the bottom of the gate trench portion.

4. The vertical semiconductor device according to claim 2, wherein

the bottom of the diode trench portion is provided, in a depth direction of the gallium nitride layer, at a position identical to that of the bottom of the gate trench portion.

5. The vertical semiconductor device according to claim 2, wherein

a width of the diode trench portion is larger than a width of the gate trench portion in the array direction.

6. The vertical semiconductor device according to claim 2, wherein

a width of the second upper drift region connected to the bottom of the gate trench portion is smaller than a width of the first upper drift region connected to the bottom of the diode trench portion in the array direction.

7. The vertical semiconductor device according to claim 2, wherein

a width of the diode trench portion is smaller than a width of the gate trench portion in the array direction.

8. The vertical semiconductor device according to claim 1, wherein

the vertical semiconductor device further comprises an ohmic electrode layer that is at least in contact with the diode trench portion and the upper surface of the gallium nitride layer, and

the conductive portion provided inside the diode trench portion is a metal conductive portion having a work function larger than that of the ohmic electrode layer.

9. The vertical semiconductor device according to claim 2, wherein

the vertical semiconductor device further has an embedded region of a second conductivity type between the first well region and the lower drift region.

10. The vertical semiconductor device according to claim 1, wherein

the vertical semiconductor device further comprises an edge termination region provided so as to surround the transistor region and the Schottky diode region in a top view,

the gallium nitride layer in the edge termination region has:

a second well region of a second conductivity type;

an edge trench portion that is in direct contact with the second well region in the array direction and that is provided from the upper surface of the gallium nitride layer to a position shallower than a bottom of the second well region;

a third upper drift region of a first conductivity type that is connected to a bottom of the edge trench portion; and

an insulating film that is provided inside the edge trench portion and that is connected to the third upper drift region, and

the lower drift region is also connected to a bottom of the third upper drift region.

11. A method of manufacturing a vertical semiconductor device having a transistor region and a Schottky diode region in direct contact with the transistor region, the method comprising:

epitaxially forming, on a gallium nitride substrate of a first conductivity type, a gallium nitride layer that at least has a first gallium nitride layer of a first conductivity type and a second gallium nitride layer of a second conductivity type;

etching the gallium nitride layer to form a trench from an upper surface of the gallium nitride layer to a position shallower than a bottom of the second gallium nitride layer;

implanting dopants of a first conductivity type at least between the trench and the first gallium nitride layer to form an upper drift region of a first conductivity type that is connected to a bottom of the trench and an upper portion of the first gallium nitride layer; and

forming, inside the trench, a diode conductive portion of the Schottky diode region that is connected to the upper drift region at the bottom of the trench.