Magnetic memory device

• US 10,644,225 B2
• Filed: 09/12/2017
• Issued: 05/05/2020
• Est. Priority Date: 04/27/2015
• Status: Active Grant

• Current Assignee: Kioxia Corporation
• Original Assignee: Toshiba Memory Corporation (Kioxia Corporation)
• Inventors: Fujimori, Takeshi
• Primary Examiner(s): Maruf, Sheikh
• Application Number:
  US15/702,744
• Publication Number:
  US 20180006212A1
• Time in Patent Office: 966 Days
• Field of Search: 257421, 257422
• CPC Class Codes: G11C 11/15 using multiple magnetic layers G11C11/155 takes precedence
• CPC Class Codes: G11C 11/161 details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 2224/06135 Covering only the peripheral area of the surface to be connected, i.e. peripheral arrangements
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48106 the connector being orthogonal to a side surface of the semiconductor or solid-state body, e.g. parallel layout
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/49175 Parallel arrangements
• CPC Class Codes: H01L 2224/73215 Layer and wire connectors
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/92165 the second connecting process involving a layer connector
• CPC Class Codes: H01L 2225/0651 Wire or wire-like electrical connections from device to substrate
• CPC Class Codes: H01L 2225/06537 Electromagnetic shielding
• CPC Class Codes: H01L 2225/06575 Auxiliary carrier between devices, the carrier having no electrical connection structure
• CPC Class Codes: H01L 23/3128 the substrate having spherical bumps for external connection
• CPC Class Codes: H01L 23/552 Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 24/06 of a plurality of bonding areas
• CPC Class Codes: H01L 24/32 : of an individual layer connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/49 : of a plurality of wire connectors
• CPC Class Codes: H01L 24/73 : Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 24/92 : Specific sequence of method steps
• CPC Class Codes: H01L 25/0657 : Stacked arrangements of devices
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/1434 : Memory
• CPC Class Codes: H01L 2924/1443 : Non-volatile random-access memory [NVRAM]
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H10B 61/22 : of the field-effect transistor [FET] type
• CPC Class Codes: H10N 50/10 : Magnetoresistive devices
• CPC Class Codes: H10N 50/80 : Constructional details

Abstract

According to one embodiment, a magnetic memory device includes a magnetic memory chip having a magnetoresistive element, a magnetic layer having first and second portions spacing out each other, the first portion covering a first main surface of the magnetic memory chip, the second portion covering a second main surface facing the first main surface of the magnetic memory chip, a circuit board on which the magnetic layer is mounted, and a bonding wire connecting between the magnetic memory chip and the circuit board in a first direction parallel to the first and second main surfaces.

Claims

1. further A magnetic memory device comprising:

a magnetic memory chip having a magnetoresistive element;

a magnetic layer having first and second portions which are separated from each other so that there is a space between the first and second portions, the first portion covering a first main surface of the magnetic memory chip, and the second portion covering a second main surface of the magnetic memory chip opposite from the first main surface of the magnetic memory chip;

a circuit board on which the magnetic layer is mounted;

a bonding wire connecting between the magnetic memory chip and the circuit board in a first direction parallel to the first and second main surfaces; and

a permanent magnet that is adjacent to one of the first and second main surfaces of the magnetic memory chip;

wherein;

the first portion is nearer the circuit board than the second portion,

each of the first and second portions has a size larger than a size of the magnetic memory chip in the first direction,

the second portion covers side surfaces of the magnetic memory chip in a second direction parallel to the first and second main surfaces and orthogonal to the first direction, and

the first portion has first and second ends in the second direction, the second portion has third and fourth ends in the second direction, the first end and the third end face each other in a third direction orthogonal to the first and second directions, and the second end and the fourth end face each other in the third direction.

2. The device of claim 1, further comprising:

a spacer between the magnetic memory chip and the second portion,

wherein the permanent magnet is provided on the first portion, and the magnetic memory chip is provided on the permanent magnet.

3. The device of claim 1, further comprising:

a spacer between the magnetic memory chip and the second portion,

wherein the magnetic memory chip is provided on the first portion, and the permanent magnet is provided between the spacer and the second portion.

4. The device of claim 1, wherein the magnetic memory chip is provided on the first portion, and the permanent magnet is provided between the magnetic memory chip and the second portion.

5. A further A magnetic memory device comprising:

a magnetic memory chip having a magnetoresistive element;

a magnetic layer having first and second portions which are separated from each other so that there is a space between the first and second portions, the first portion covering a first main surface of the magnetic memory chip, and the second portion covering a second main surface of the magnetic memory chip opposite from the first main surface of the magnetic memory chip;

a circuit board on which the magnetic layer is mounted;

a bonding wire connecting between the magnetic memory chip and the circuit board in a first direction parallel to the first and second main surfaces; and

a permanent magnet that is adjacent to one of the first and second main surfaces of the magnetic memory chip,

wherein;

the first portion is nearer the circuit board than the second portion,

each of the first and second portions has a size larger than a size of the magnetic memory chip in the first direction,

the first portion covers side surfaces of the magnetic memory chip in a second direction parallel to the first and second main surfaces and orthogonal to the first direction, and

the first portion has first and second ends in the second direction, the second portion has third and fourth ends in the second direction, the first end and the third end face each other in a third direction orthogonal to the first and second directions, and the second end and the fourth end face each other in the third direction.

6. The device of claim 5, further comprising:

a spacer between the magnetic memory chip and the second portion,

wherein the permanent magnet is provided on the first portion, and the magnetic memory chip is provided on the permanent magnet.

7. The device of claim 5, further comprising:

a spacer between the magnetic memory chip and the second portion,

wherein the magnetic memory chip is provided on the first portion, and the permanent magnet is provided between the spacer and the second portion.

8. The device of claim 5, wherein the magnetic memory chip is provided on the first portion, and the permanent magnet is provided between the magnetic memory chip and the second portion.

9. A magnetic memory device comprising:

a magnetic memory chip having a magnetoresistive element;

a magnetic layer having first and second portions which are separated from each other so that there is a space between the first and second portions, the first portion covering a first main surface of the magnetic memory chip, and the second portion covering a second main surface of the magnetic memory chip opposite from the first main surface of the magnetic memory chip;

a circuit board on which the magnetic layer is mounted;

a bonding wire connecting between the magnetic memory chip and the circuit board in a first direction parallel to the first and second main surfaces; and

a permanent magnet that is adjacent to one of the first and second main surfaces of the magnetic memory chip,

wherein;

each of the first and second portions has a size larger than a size of the magnetic memory chip in the first direction, and

the first portion has first and second ends in a second direction that is parallel to the first and second main surfaces and orthogonal to the first direction, the second portion has third and fourth ends in the second direction, the first end and the third end face each other in a third direction orthogonal to the first and second directions, and the second end and the fourth end face each other in the third direction.