Self-aligned and misalignment-tolerant landing pad for magnetoresistive random access memory

• US 10,644,232 B2
• Filed: 12/28/2017
• Issued: 05/05/2020
• Est. Priority Date: 12/28/2017
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Annunziata, Anthony J., Kothandaraman, Chandrasekharan, Marchack, Nathan P., O'Sullivan, Eugene J.
• Primary Examiner(s): Menz, Douglas M
• Application Number:
  US15/856,681
• Publication Number:
  US 20190207099A1
• Time in Patent Office: 859 Days
• CPC Class Codes: H10B 61/00 Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
• CPC Class Codes: H10N 50/01 Manufacture or treatment
• CPC Class Codes: H10N 50/10 Magnetoresistive devices
• CPC Class Codes: H10N 50/80 Constructional details

Abstract

A semiconductor device and a method for fabricating the same. The semiconductor device includes a substrate and at least one trench line formed within the substrate. The semiconductor device further includes a self-aligned landing pad in contact with the at least one trench line, and a magnetic tunnel junction stack formed on and in contact with the self-aligned landing pad. The method includes forming a conductive layer on and in contact with at least one trench line formed within a substrate. Magnetic tunnel junction stack layers are deposited on and in contact with the conductive layer. The magnetic tunnel junction stack layers are etched to form a magnetic tunnel junction stack, where the etching stops on the conductive layer.

Claims

1. A method for fabricating a semiconductor device, the method comprising:

forming a pad layer in contact with a top surface and a recessed portion of at least one trench line formed within a substrate;

depositing magnetic tunnel junction stack layers on and in contact with the pad layer; and

etching the magnetic tunnel junction stack layers to form a magnetic tunnel junction stack, where the etching stops on the pad layer.

2. The method of claim 1, further comprising:

prior to forming the pad layer, forming a trench within a substrate;

forming a liner within the trench; and

forming the at least one trench line within the trench and in contact with the liner.

3. The method of claim 1, further comprising:

prior to depositing the magnetic tunnel junction stack layers, planarizing the pad layer.

4. The method of claim 1, wherein etching the magnetic tunnel junction stack layers to form a magnetic tunnel junction stack comprises:

forming a hardmask on the magnetic tunnel junction stack layers; and

etching portions of the magnetic tunnel junction stack layers not underlying the hardmask.

5. The method of claim 4, further comprising:

etching portions of the pad layer not underlying the hardmask and above the substrate.

6. The method of claim 5, wherein etching portions of the pad layer exposes at least a top surface of the substrate and a surface of the pad layer within a recessed area of the at least one trench line.

7. The method of claim 1, further comprising:

depositing a spacer material over and in contact with the pad layer, the magnetic tunnel junction stack, and the hardmask.

8. The method of claim 7, further comprising:

etching the spacer material to form a spacer on sidewalls of the magnetic tunnel junction stack, and the hardmask.

9. The method of claim 8, further comprising:

etching portions of the pad layer not underlying the spacer.