DC-DC converter with a dynamically adapting load-line

• US 10,644,592 B2
• Filed: 11/21/2018
• Issued: 05/05/2020
• Est. Priority Date: 08/30/2017
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Ongaro, Fabio, Couleur, Michael
• Primary Examiner(s): Zweizig, Jeffery S
• Application Number:
  US16/197,711
• Publication Number:
  US 20190109537A1
• Time in Patent Office: 531 Days
• Field of Search: None
• CPC Class Codes: G06F 1/26 Power supply means, e.g. regulation thereof for memories G11C
• CPC Class Codes: G06F 1/305 in the event of power-supply fluctuations
• CPC Class Codes: H02M 1/0045 Converters combining the concepts of switch-mode regulation and linear regulation, e.g. linear pre-regulator to switching converter, linear and switching converter in parallel, same converter or same transistor operating either in linear or switching mode
• CPC Class Codes: H02M 1/0048 Circuits or arrangements for reducing losses using snubbers H02M1/34
• CPC Class Codes: H02M 1/14 Arrangements for reducing ripples from dc input or output
• CPC Class Codes: H02M 3/155 using semiconductor devices only
• CPC Class Codes: H02M 3/156 with automatic control of output voltage or current, e.g. switching regulators
• CPC Class Codes: H03F 2200/129 there being a feedback over the complete amplifier
• CPC Class Codes: H03F 3/213 in integrated circuits
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

Systems, apparatuses, and methods for efficiently generating a stable output for a transient load for one or more components are described. In various embodiments, a power converter includes two feedback loops to separate the stability and the equivalent output resistance, which allows the bandwidth to increase. The first loop includes a compensator receiving an output current of an amplifier. Additionally, a first converter and a first current mirror generate a target current based on the output current of the amplifier. Based on the target current, multiple step-down converters generate an output voltage, which is returned to the amplifier through a resistor. The second loop includes a second converter with a first order series RC filter to reduce the second loop'"'"'s response time. A second current mirror receives current from the second converter and generates a dynamically adapting feedback current, which flows through the resistor in the first loop.

Claims

1. A power converter comprising:

an operational transconductance amplifier configured to;

receive a reference voltage and a feedback voltage;

determine a voltage difference between the reference voltage and the feedback voltage; and

convey an output current based on the voltage difference; and

a compensator configured to;

receive the output current; and

convey a first voltage based on the output current; and

first circuitry configured to;

receive the first voltage from the compensator; and

generate an output voltage on an output node based at least in part on the first voltage;

wherein the first circuitry further comprises;

a converter configured to receive the first voltage from the compensator and generate a first reference current; and

a current mirror configured to receive the first reference current from the converter and generate a target current based on the first reference current.

2. The power converter as recited in claim 1, wherein the first circuitry further comprises a plurality of step-down direct current to direct current (DC-DC) converters configured to:

receive the target current from the current mirror;

receive an input voltage; and

generate the output voltage on the output node as a fraction of the input voltage, wherein the fraction is based on a duty cycle within the plurality of step-down DC-DC converters.

3. The power converter as recited in claim 1, further comprising a resistor connected between the output node and an input of the operational transconductance amplifier receiving the feedback voltage.

4. The power converter as recited in claim 3, further comprising second circuitry configured to decrease a feedback current flowing through the resistor, in response to determining a difference between the output voltage and the reference voltage is decreasing.

5. The power converter as recited in claim 3, further comprising second circuitry configured to increase a feedback current flowing through the resistor, in response to determining a difference between the output voltage and the reference voltage is increasing.

6. The power converter as recited in claim 1, wherein the operational transconductance amplifier is an open-loop amplifier with no local feedback to provide stability.

7. The power converter as recited in claim 6, wherein the compensator is a Type II compensator for the operational transconductance amplifier.

8. A method comprising:

receiving, by an operational transconductance amplifier, a reference voltage and a feedback voltage;

determining, by the operational transconductance amplifier, a voltage difference between the reference voltage and the feedback voltage;

conveying, by the operational transconductance amplifier, an output current based on the voltage difference;

conveying, by a compensator, a first voltage based on the output current;

generating, by first circuitry, an output voltage on an output node based at least in part on the first voltage;

receiving, by a converter of the first circuitry, the first voltage from the compensator;

generating, by the converter, a first reference current,

receiving, by a current mirror of the first circuitry, the first reference current from the converter; and

generating, by the current mirror, a target current based on the first reference current.

9. The method as recited in claim 8, further comprising:

receiving, by a plurality of step-down direct current to direct current (DC-DC) converters of the first circuitry, the target current from the current mirror;

receiving, by the plurality of step-down DC-DC converters, an input voltage; and

generating, by the plurality of step-down DC-DC converters, the output voltage on the output node as a fraction of the input voltage, wherein the fraction is based on a duty cycle within the plurality of step-down DC-DC converters.

10. The method as recited in claim 8, further comprising connecting, by a resistor, the output node and an input of the operational transconductance amplifier receiving the feedback voltage.

11. The method as recited in claim 10, further comprising decreasing, by second circuitry, a feedback current flowing through the resistor, in response to determining a difference between the output voltage and the reference voltage is decreasing.

12. The method as recited in claim 8, wherein the operational transconductance amplifier is an open-loop amplifier with no local feedback to provide stability.

13. A system on a chip comprising:

a primary converter configured to convert an external voltage to an internal voltage;

a plurality of functional units; and

a power converter configured to generate an output voltage based on at least the internal voltage to one or more of the plurality of functional units, wherein the power converter comprises;

an operational transconductance amplifier configured to;

receive a reference voltage and a feedback voltage;

determine a voltage difference between the reference voltage and the feedback voltage; and

convey an output current based on the voltage difference; and

a compensator configured to;

receive the output current; and

convey a first voltage based on the output current; and

first circuitry configured to;

receive the first voltage from the compensator; and

generate an output voltage on an output node based at least in part on the first voltage.

14. The system on a chip as recited in claim 13, wherein the first circuitry of the power converter further comprises a converter configured to:

receive the first voltage from the compensator; and

generate a first reference current.

15. The system on a chip as recited in claim 14, wherein the first circuitry of the power converter further comprises a current mirror configured to:

receive the first reference current from the converter; and

generate a target current based on the first reference current.

16. The system on a chip as recited in claim 15, wherein the first circuitry of the power converter further comprises a plurality of step-down direct current to direct current (DC-DC) converters configured to:

receive the target current from the current mirror;

receive an input voltage; and

generate the output voltage on the output node as a fraction of the input voltage, wherein the fraction is based on a duty cycle within the plurality of step-down DC-DC converters.