Display device
First Claim
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1. A display device comprising:
- a first source line;
a second source line adjacent to the first source line;
a third source line adjacent to the second source line;
a gate line;
a transistor; and
a pixel electrode,wherein a gate of the transistor is electrically connected to the gate line, one of a source and a drain of the transistor is electrically connected to the first source line, the other of the source and the drain of the transistor is electrically connected to the pixel electrode,wherein the pixel electrode overlaps with the second source line and the third source line,wherein the pixel electrode does not overlap with the first source line, andwherein a distance between the first source line and the second source line is larger than a distance between the second source line and the third source line.
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Abstract
To achieve a display device that is suitable for increasing in size and to provide a high-resolution display device. In the display device, three or more adjacent gate lines are supplied with the same selection signal. Three or more pixels that adjoin in the column direction are connected to different source lines. In each of the pixels, a transistor including a semiconductor layer is disposed. An inner source line among three or more source lines is disposed to overlap with a conductive layer that functions as a pixel electrode. Part of the semiconductor layer of the transistor is provided between the outer source line and a source line adjacent to the outer source line.
23 Citations
20 Claims
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1. A display device comprising:
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a first source line; a second source line adjacent to the first source line; a third source line adjacent to the second source line; a gate line; a transistor; and a pixel electrode, wherein a gate of the transistor is electrically connected to the gate line, one of a source and a drain of the transistor is electrically connected to the first source line, the other of the source and the drain of the transistor is electrically connected to the pixel electrode, wherein the pixel electrode overlaps with the second source line and the third source line, wherein the pixel electrode does not overlap with the first source line, and wherein a distance between the first source line and the second source line is larger than a distance between the second source line and the third source line. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A display device comprising:
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a first source line; a second source line adjacent to the first source line; a third source line adjacent to the second source line; a first gate line; a second gate line; a first transistor; a second transistor; a first pixel electrode; and a second pixel electrode, wherein a gate of the first transistor is electrically connected to the first gate line, one of a source and a drain of the first transistor is electrically connected to the first source line, and the other of the source and the drain of the first transistor is electrically connected to the first pixel electrode, wherein a gate of the second transistor is electrically connected to the second gate line, one of a source and a drain of the second transistor is electrically connected to the second source line, and the other of the source and the drain of the second transistor is electrically connected to the second pixel electrode, wherein the first pixel electrode and the second pixel electrode overlap with the second source line and the third source line, wherein the first pixel electrode and the second pixel electrode do not overlap with the first source line, and wherein a distance between the first source line and the second source line is larger than a distance between the second source line and the third source line. - View Dependent Claims (8, 9, 10, 11, 12, 13, 14)
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15. A display device comprising:
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a first source line; a second source line adjacent to the first source line; a third source line adjacent to the second source line; a fourth source line adjacent to the third source line; a first gate line; a second gate line; a third gate line; a fourth gate line; a first transistor; a second transistor; a third transistor; a fourth transistor; a first pixel electrode; a second pixel electrode; a third pixel electrode; and a fourth pixel electrode, wherein a gate of the first transistor is electrically connected to the first gate line, one of a source and a drain of the first transistor is electrically connected to the first source line, and the other of the source and the drain of the first transistor is electrically connected to the first pixel electrode, wherein a gate of the second transistor is electrically connected to the second gate line, one of a source and a drain of the second transistor is electrically connected to the second source line, and the other of the source and the drain of the second transistor is electrically connected to the second pixel electrode, wherein a gate of the third transistor is electrically connected to the third gate line, one of a source and a drain of the third transistor is electrically connected to the third source line, and the other of the source and the drain of the third transistor is electrically connected to the third pixel electrode, wherein a gate of the fourth transistor is electrically connected to the fourth gate line, one of a source and a drain of the fourth transistor is electrically connected to the fourth source line, and the other of the source and the drain of the fourth transistor is electrically connected to the fourth pixel electrode, wherein the first pixel electrode, the second pixel electrode, the third pixel electrode and the fourth pixel electrode overlap with the second source line and the third source line, wherein the first pixel electrode, the second pixel electrode, the third pixel electrode and the fourth pixel electrode do not overlap with the first source line, and wherein a distance between the first source line and the second source line and a distance between the third source line and the fourth source line are larger than a distance between the second source line and the third source line. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification
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Current AssigneeSemiconductor Energy Laboratory Co., Ltd.
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Original AssigneeSemiconductor Energy Laboratory Co., Ltd.
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InventorsYamazaki, Shunpei, Takahashi, Kei
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Primary Examiner(s)Pan, Jia X
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Application NumberUS16/521,827Publication NumberTime in Patent Office292 DaysField of SearchUS Class CurrentCPC Class CodesG02F 1/1343 Electrodes reflective elect...G02F 1/136213 Storage capacitors associat...G02F 1/136286 Wiring, e.g. gate line, dra...
