Test device and method

• US 10,656,176 B2
• Filed: 12/09/2016
• Issued: 05/19/2020
• Est. Priority Date: 06/22/2016
• Status: Active Grant

• Current Assignee: Delta Electronics Incorporated
• Original Assignee: Delta Electronics Incorporated
• Inventors: Chen, Tien-He, Lin, Shou-Chieh, Chen, Che-Min
• Primary Examiner(s): Nguyen, Tung X
• Application Number:
  US15/373,796
• Publication Number:
  US 20170370964A1
• Time in Patent Office: 1,257 Days
• CPC Class Codes: G01R 1/0416 Connectors, terminals G01R1/0425 and G01R1/0433 take precedence; with measurement function for battery poles G01R31/364
• CPC Class Codes: G06F 11/273 Tester hardware, i.e. output processing circuits G06F11/263 takes precedence
• CPC Class Codes: G06F 11/3027 where the computing system component is a bus

Abstract

A test device and a method are provided in the invention. The test device includes a first connection interface, a storage device, a processor and a second connection interface. The first connection interface is coupled to a device under test (DUT) and obtains power information from the DUT according to a first instruction. The storage device stores the power information. The processor is coupled to the first connection interface and storage device, when the first connection interface is coupled to the DUT, sends the first instruction to the first connection interface, receives the power information from the first connection interface, and stores the power information in the storage device. The second connection interface is coupled to an external controlling system, sends the power information to the external controlling system and receives a test instruction from the external controlling system to test the DUT.

Claims

1. A test device, comprising:

a first connection interface, coupled to a device under test (DUT) and obtaining power information from the DUT according to a first instruction;

a storage device, storing the power information;

a processor, coupled to the first connection interface and storage device, when the first connection interface is coupled to the DUT, sending the first instruction to the first connection interface, receiving the power information from the first connection interface, and storing the power information in the storage device;

a second connection interface, coupled to an external controlling system, sending the power information to the external controlling system and receiving a test instruction from the external controlling system to test the DUT;

a first controller, coupled to the first connection interface and the processor, and converting a first communication format which is applicable to the first connection interface to a second communication format which is applicable to the processor; and

a second controller, coupled to the second connection interface and the processor, and converting the second communication format which is applicable to the processor to a third communication format which is applicable to the second connection interface.

2. The test device of claim 1, further comprising:

a first controller, coupled to the first connection interface and the processor, and converting a first communication format which is applicable to the first connection interface to a second communication format which is applicable to the processor.

3. The test device of claim 2, wherein the processor converts the second communication format which is applicable to the processor to a third communication format which is applicable to the second connection interface.

4. The test device of claim 1, wherein the first connection interface is a USB Type-C connection interface, and the second connection interface is a serial communication interface.

5. The test device of claim 4, wherein the first connection interface obtains the power information of the DUT through a configuration channel (CC) pin of the USB Type-C connection interface.

6. The test device of claim 1, wherein the processor sends a power request to the DUT through the first connection interface according to the test instruction to inform the DUT that the DUT needs to provide power corresponding to the power request.

7. The test device of claim 6, wherein when the external controlling system sends a serial instruction to request the power information of the DUT, the test device sends the power information to the external controlling system through the second connection interface and the external controlling system sends the test instruction to the second connection interface according to the power information.

8. The test device of claim 1, wherein the storage device stores a look-up table, and the power information stored in the look-up table.

9. A test method, applied in a test device, comprising:

when a first connection interface of the test device is coupled to a device under test (DUT), sending a first instruction to the DUT through the first connection interface to obtain power information from the DUT;

storing the power information in a storage device, wherein the storage device is externally connected to a processor of the test device;

when an external controlling system sends a serial instruction to request the power information of the DUT, sending the power information to the external controlling system through a second connection interface of the test device; and

receiving a test instruction from the external controlling system through the second connection interface to test the DUT,

wherein the test method further comprising;

converting, by a first controller, a first communication format which is applicable to the first connection interface to a second communication format which is applicable to the processor; and

converting, by a second controller, the second communication format which is applicable to the processor to a third communication format which is applicable to the second connection interface.

10. The test method of claim 9, further comprising:

converting, by a first controller, a first communication format which is applicable to the first connection interface to a second communication format which is applicable to the processor; and

converting, by the processor, the second communication format which is applicable to the processor to a third communication format which is applicable to the second connection interface.

11. The test method of claim 9, wherein the first connection interface is a USB Type-C connection interface, and the second connection interface is a serial communication interface.

12. The test method of claim 11, further comprising:

obtaining the power information of the DUT through a configuration channel (CC) pin of the USB Type-C connection interface.

13. The test method of claim 9, further comprising:

sending a power request to the DUT through the first connection interface according to the test instruction to inform the DUT that the DUT needs to provide power corresponding to the power request.

14. The test method of claim 13, further comprising:

sending, by the external controlling system, the test instruction to the second connection interface according to the power information.

15. The test method of claim 9, further comprising:

storing the power information in a look-up table of the storage device.