Input and output recording device and method, CPU and data read and write operation method thereof

• US 10,657,022 B2
• Filed: 02/13/2018
• Issued: 05/19/2020
• Est. Priority Date: 02/20/2017
• Status: Active Grant

• Current Assignee: Tsinghua University
• Original Assignee: Tsinghua University
• Inventors: Liu, Leibo, Luo, Ao, Wei, Shaojun
• Primary Examiner(s): Misiura, Brian T
• Application Number:
  US15/895,686
• Publication Number:
  US 20180239686A1
• Time in Patent Office: 826 Days
• Field of Search: 710 15, 710 18, 710 29
• CPC Class Codes: G06F 11/3476 Data logging G06F11/14, G06F11/2205 take precedence
• CPC Class Codes: G06F 11/348 Circuit details, i.e. tracer hardware
• CPC Class Codes: G06F 11/3485 for I/O devices
• CPC Class Codes: G06F 11/349 for interfaces, buses
• CPC Class Codes: G06F 21/566 Dynamic detection, i.e. detection performed at run-time, e.g. emulation, suspicious activities
• CPC Class Codes: G06F 21/71 to assure secure computing or processing of information

Abstract

The disclosure provides an input and output recording device and method, CPU and data read and write operation method thereof. The input and output recording device is provided between a central processor CPU and a peripheral, and is configured to record data read and write operations between the CPU and the peripheral, wherein the data read and write operations comprise a data read and write operation initiated by the peripheral and a data read and write operation initiated by the CPU; the input and output recording device is further configured to request the CPU to process the data read and write operation initiated by the peripheral, and upon receiving an instruction sent by the CPU, send a data packet of the data read and write operation initiated by the peripheral to the CPU. The disclosure can accurately record the data read and write operation between the CPU and the peripheral, so as to eliminate the influence of uncertainty caused by the asynchronous data read and write operations initiated by the peripherals, and provide a basis for the input and output security checking of the CPU.

Claims

1. An input and output recording device, wherein

the input and output recording device is provided between a central processor CPU and a peripheral, and is configured to record data read and write operations between the CPU and the peripheral, the data read and write operations comprise a data read and write operation initiated by the peripheral and a data read and write operation initiated by the CPU;

wherein the input and output recording device is further configured to request the CPU to process the data read and write operation initiated by the peripheral, and upon receiving an instruction sent by the CPU, send a data packet of the data read and write operation initiated by the peripheral to the CPU,

wherein the input and output recording device is further configured to request the CPU to process the data read and write operation initiated by the peripheral when the data packet of the data read and write operation initiated by the peripheral stored in the input and output recording device reaches a preset threshold.

2. The input and output recording device of claim 1, wherein the input and output recording device is further configured to request the CPU to process the data read and write operation initiated by the peripheral using an interrupt mode.

3. The input and output recording device of claim 1, wherein the input and output recording device is further configured to obtain an identification of the peripheral and determine whether to record the data read and write operation between the CPU and the peripheral according to the identification of the peripheral.

4. The input and output recording device of claim 1, wherein the input and output recording device is further configured to obtain a transaction identification of the data packet of the data read and write operation between the CPU and the peripheral, and determine whether the data read and write operation between the CPU and the peripheral is the data read and write operation initiated by the peripheral according to the transaction identification.

5. The input and output recording device of claim 1, wherein the input and output recording device comprises:

a first partition configured to record a data packet flowing from the peripheral to the CPU; and

a second partition configured to record a data packet flowing from the CPU to the peripheral.

6. The input and output recording device of claim 1, wherein the input and output recording device comprises:

a trace buffer configured to record the data read and write operation between the CPU and the peripheral, the data read and write operation comprises the data read and write operation initiated by the peripheral and the data read and write operation initiated by the CPU; and

a pause buffer configured to request the CPU to process the data read and write operation initiated by the peripheral, and upon receiving the instruction sent by the CPU, send the buffered data packet of the data read and write operation initiated by the peripheral to the CPU through the trace buffer.

7. The input and output recording device of claim 5, wherein:

the first partition is further configured to organize the recorded data packet flowing from the peripheral to the CPU according to the type of the data read and write operation; and

the second partition is further configured to organize the recorded data packet flowing from the CPU to the peripheral according to the type of the data read and write operation.

8. The input and output recording device of claim 7, wherein the first partition comprises:

a first sub-region for recording the data packet flowing from the peripheral to the CPU of Memory mapped I/O (MMIO) type;

a second sub-region for recording the data packet flowing from the peripheral to the CPU of Direct Memory Access (DMA) type;

a third sub-region for recording the data packet flowing from the peripheral to the CPU of Peer to Peer (P2P) type; and

a fourth sub-region for recording other type of the data packet flowing from the peripheral to the CPU except for the MMIO type, the DMA type and the P2P type; and

wherein the second partition comprises;

a fifth sub-region for recording the data packet flowing from the CPU to the peripheral of MMIO type;

a sixth sub-region for recording the data packet flowing from the CPU to the peripheral of DMA type;

a seventh sub-region for recording the data packet flowing from the CPU to the peripheral of P2P type; and

an eighth sub-region for recording other type of the data packet flowing from the CPU to the peripheral except for the MMIO type, the DMA type and the P2P type.

9. An input and output recording method, comprising:

recording data read and write operations between a central processor CPU and a peripheral, the data read and write operations comprising a data read and write operation initiated by the peripheral and a data read and write operation initiated by the CPU; and

requesting the CPU to process the data read and write operation initiated by the peripheral, and upon receiving an instruction sent by the CPU, send a data packet of the data read and write operation initiated by the peripheral to the CPU,

wherein the requesting the CPU to process the data read and write operation initiated by the peripheral comprises;

requesting the CPU to process the data read and write operation initiated by the peripheral when the data packet of the stored data read and write operation initiated by the peripheral reaches a preset threshold.

10. The input and output recording method of claim 9, wherein the requesting the CPU to process the data read and write operation initiated by the peripheral comprises:

requesting the CPU to process the data read and write operation initiated by the peripheral using an interrupt mode.

11. The input and output recording method of claim 9, further comprising:

obtaining an identification of the peripheral; and

determining whether to record the data read and write operation between the CPU and the peripheral according to the identification of the peripheral.

12. The input and output recording method of claim Original 9, further comprising:

obtaining a transaction identification of the data packet of the data read and write operation between the CPU and the peripheral; and

determining whether the data read and write operation between the CPU and the peripheral is the data read and write operation initiated by the peripheral according to the transaction identification.