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Virtual drain for decreased harmonic generation in fully depleted SOI (FDSOI) RF switches

  • US 10,658,390 B2
  • Filed: 07/10/2018
  • Issued: 05/19/2020
  • Est. Priority Date: 07/10/2018
  • Status: Active Grant
First Claim
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1. A structure comprising:

  • one or more active devices on a semiconductor on insulator material which is on top of a substrate;

    a virtual drain region comprising a well region within the substrate and spaced apart from an active region of the one or more devices, the virtual drain region configured to be biased to collect electrons which would accumulate in the substrate, and the virtual drain region being spaced apart from a source/drain region of an adjacent device of the one or more active devices;

    a shallow trench isolation region partly within the virtual drain region, wherein an edge of the virtual drain region is remote from an edge of the shallow trench isolation region; and

    a doped skin on the shallow trench isolation region, facing the adjacent device of the one or more active devices.

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