Synchronous rectification circuit, corresponding device and method
First Claim
1. A circuit configured to be coupled to a field effect transistor that has a channel between source and drain terminals as well as a body diode and a gate terminal configured to control electrical current flow in the field effect transistor channel, wherein the circuit comprises:
- a sense terminal configured to sense a drain-to-source voltage of the field effect transistor;
a drive terminal configured to drive the gate terminal of the field effect transistor to alternatively turn the field effect transistor on and off to provide a rectified current flow in the field effect transistor channel;
a comparator coupled to the sense terminal, the comparator configured to perform a comparison of the drain-to-source voltage of the field effect transistor with a reference threshold and to detect alternate downward and upward crossings of the reference threshold and the drain-to-source voltage; and
a PWM signal generator coupled to the comparator and the drive terminal, the PWM signal generator configured to drive the gate terminal of the field effect transistor to turn the field effect transistor on and off as a result of the alternate downward and upward crossings of the reference threshold by the drain-to-source voltage.
1 Assignment
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Accused Products
Abstract
A sense terminal is configured to sense a drain-to-source voltage of a field effect transistor and a drive terminal is configured to drive the gate terminal of the field effect transistor to alternatively turn the field effect transistor on and off to provide a rectified current flow in the field effect transistor channel. A comparator is configured to perform a comparison of the drain-to-source voltage of the field effect transistor with a reference threshold and to detect alternate downward and upward crossings of the reference threshold and the drain-to-source voltage. A PWM signal generator is configured to drive the gate terminal of the field effect transistor to turn the field effect transistor on and off as a result of the alternate downward and upward crossings of the reference threshold by the drain-to-source voltage.
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Citations
29 Claims
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1. A circuit configured to be coupled to a field effect transistor that has a channel between source and drain terminals as well as a body diode and a gate terminal configured to control electrical current flow in the field effect transistor channel, wherein the circuit comprises:
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a sense terminal configured to sense a drain-to-source voltage of the field effect transistor; a drive terminal configured to drive the gate terminal of the field effect transistor to alternatively turn the field effect transistor on and off to provide a rectified current flow in the field effect transistor channel; a comparator coupled to the sense terminal, the comparator configured to perform a comparison of the drain-to-source voltage of the field effect transistor with a reference threshold and to detect alternate downward and upward crossings of the reference threshold and the drain-to-source voltage; and a PWM signal generator coupled to the comparator and the drive terminal, the PWM signal generator configured to drive the gate terminal of the field effect transistor to turn the field effect transistor on and off as a result of the alternate downward and upward crossings of the reference threshold by the drain-to-source voltage. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A circuit comprising:
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a rectification circuit comprising a field effect transistor that has a channel between source and drain terminals and a gate terminal configured to control electrical current flow in the channel; a sense terminal configured to sense a drain-to-source voltage of the field effect transistor; a drive terminal coupled to the gate terminal of the field effect transistor to alternatively turn the field effect transistor on and off to provide a rectified current flow in the field effect transistor channel; a comparator circuit coupled to the sense terminal, the comparator circuit configured to perform a comparison of the drain-to-source voltage of the field effect transistor with a reference threshold and to detect alternate downward and upward crossings of the reference threshold and the drain-to-source voltage; and a PWM signal generator coupled to the gate terminal of the field effect transistor, the comparator circuit and the drive terminal, the PWM signal generator configured to drive the gate terminal of the field effect transistor to turn the field effect transistor on and off as a result of the alternate downward and upward crossings of the reference threshold by the drain-to-source voltage. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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21. A method of driving a field effect transistor that has a channel between source and drain terminals and a gate terminal that is configured to control electrical current flow in the field effect transistor channel, the method comprising:
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sensing a drain-to-source voltage of the field effect transistor; comparing a drain-to-source voltage of the field effect transistor with a reference threshold; detecting alternate downward and upward crossings of the reference threshold by the drain-to-source voltage; and driving the gate terminal of the field effect transistor with a PWM signal by turning the field effect transistor on and off as a result of the alternate downward and upward crossings of the reference threshold by the drain-to-source voltage, the driving causing a rectified current flow in the field effect transistor channel. - View Dependent Claims (22, 23, 24, 25, 26, 27, 28, 29)
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Specification