×

System and method for port-to-port communications using direct memory access

  • US 10,664,420 B2
  • Filed: 04/19/2018
  • Issued: 05/26/2020
  • Est. Priority Date: 04/19/2018
  • Status: Active Grant
First Claim
Patent Images

1. A system that facilitates chip-to-chip transport of header descriptors and payloads, comprising:

  • a source chip;

    a destination chip;

    a set of queues describing buffer memory locations for staging the header descriptors and the payloads to be transferred from the source chip to the destination chip, wherein the set of queues are directly accessible to the source chip and to the destination chip; and

    a host device coupled to the source chip and the destination chip and that executes a setup routine to establish the set of queues in a non-host device memory prior to transfer of the header descriptors and the payloads from the source chip to the destination chip, wherein the transfer of the header descriptors and the payloads from the source chip to the destination chip flows through the set of queues in the non-host device memory and bypasses a central processing unit (CPU) of the host device after the set of queues have been established by the host device.

View all claims
  • 3 Assignments
Timeline View
Assignment View
    ×
    ×