Methods and apparatuses for self-trimming of a semiconductor device

• US 10,665,314 B1
• Filed: 02/06/2020
• Issued: 05/26/2020
• Est. Priority Date: 04/05/2018
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Jimenez-Olivares, Miguel, Kuzmenka, Maksim
• Primary Examiner(s): Lappas, Jason
• Application Number:
  US16/784,046
• Publication Number:
  US 20200176070A1
• Time in Patent Office: 110 Days
• Field of Search: 36518907, 36518525
• CPC Class Codes: G11C 11/4074 Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
• CPC Class Codes: G11C 2207/2254 Calibration
• CPC Class Codes: G11C 29/021 in voltage or current generators
• CPC Class Codes: G11C 29/028 with adaption or trimming of parameters
• CPC Class Codes: G11C 29/50008 of impedance
• CPC Class Codes: G11C 5/147 Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops G11C5/141 takes precedence

Abstract

Methods and apparatuses are provided for self-trimming of a semiconductor device. An example self-trimming circuit includes a control circuit configured to, during a self-trimming operation, decode a test command signal to set a target voltage and set a voltage trim code to an initial value, and to adjust a value of the voltage trim code based on a stop signal. The example self-trimming circuit further includes a reference voltage regulator configured to receive the voltage trim code and to convert a band-gap reference voltage to an output voltage based on the voltage trim code, and a comparator configured to compare the target voltage with the output voltage and to provide the stop signal having a value based on the comparison.

Claims

1. A self-trimming circuit of a semiconductor device comprising:

a control circuit configured to, during a self-trimming operation, decode a test command signal to set a target voltage and set a voltage trim code to an initial value, wherein the control circuit is further configured to adjust a value of the voltage trim code based on a stop signal;

a reference voltage regulator configured to receive the voltage trim code and to convert a band-gap reference voltage to an output voltage based on the voltage trim code; and

a comparator configured to compare the target voltage with the output voltage and to provide the stop signal having a value based on the comparison.

2. The self-trimming circuit of the semiconductor device of claim 1, further comprising a digital-to-analog converter configured to receive a target voltage code and a reference voltage and to convert the reference voltage to the target voltage based on the target voltage, wherein the control circuit is configured to determine the target voltage code based on the test command signal.

3. The self-trimming circuit of the semiconductor device of claim 1, further comprising an anti-fuse bank comprising a set of anti-fuses, wherein the control circuit is further configured to program the anti-fuse bank with a value of the voltage trim code that resulted in the output voltage matching the target voltage.

4. The self-trimming circuit of the semiconductor device of claim 1, wherein the control circuit further comprises a test command decoder configured to decode the test command signal to determine a voltage identifier, wherein the control circuit is configured to set the initial value of the voltage trim code based on the voltage identifier.

5. The self-trimming circuit of the semiconductor device of claim 4, wherein the control circuit further comprises a multiplexer configured to receive a default target voltage code and a custom voltage code and to provide one of the default target voltage code and the custom voltage code as the target voltage code based on a control signal from the test command decoder, wherein the test command decoder is configured to decode the test command signal to determine selection of the default target voltage code and the custom voltage code and to set a value of the control signal based on the selection.

6. The self-trimming circuit of the semiconductor device of claim 5, further comprising a metal option bank configured to provide the default target voltage code based on the voltage identifier.

7. The self-trimming circuit of the semiconductor device of claim 1, wherein the reference voltage regulator includes a variable impedance device having an impedance based on a value of the voltage trim code, wherein the output voltage is based on an impedance of the variable impedance device.

8. The self-trimming circuit of the semiconductor device of claim 7, wherein the reference voltage regulator further includes a feedback impedance device coupled between an output of the reference voltage regulator and an input of the reference voltage regulator, wherein the output voltage is further based on an impedance of the feedback impedance device.

9. The self-trimming circuit of the semiconductor device of claim 1, further comprising a switching circuit configured to selectively provide the output voltage from the reference voltage regulator to the comparator in response to a switch signal from the control circuit.

10. The self-trimming circuit of the semiconductor device of claim 1, further comprising an output buffer configured to drive the output voltage from the reference voltage regulator to the comparator.

11. A method comprising:

during a self-trimming operation;

decoding, via a self-trimming circuit of a semiconductor device, a test command signal to set a target voltage and set a voltage trim code to an initial value;

adjusting a value of the voltage trim code based on a stop signal;

converting a band-gap reference voltage to an output voltage based on the voltage trim code; and

providing the stop signal having a value based on a comparison between the target voltage and the output voltage.

12. The method of claim 11, further comprising converting the reference voltage to the target voltage.

13. The method of claim 12, further comprising determining the target voltage code based on the test command signal.

14. The method of claim 11, further comprising programming an anti-fuse bank with a value of the voltage trim code that resulted in the output voltage matching the target voltage.

15. The method of claim 11, further comprising setting the initial value of the voltage trim code based on a voltage identifier retrieved from the test command signal.

16. The method of claim 15, further comprising decoding the test command signal to determine the voltage identifier.

17. The method of claim 11, further comprising:

receiving a default target voltage code and a custom voltage code; and

providing one of the default target voltage code or the custom voltage code as the target voltage code based on selection of the default target voltage code or the custom voltage code retrieved from the test command signal.

18. The method of claim 17, further comprising decoding the test command signal to determine the selection of the default target voltage code or the custom voltage code.

19. The method of claim 17, further comprising receiving the default target voltage code from a metal option bank based on a voltage identifier retrieved from the test command signal.

20. The method of claim 11, further comprising adjusting an impedance of a variable impedance device of the self-trimming circuit a value of the voltage trim code to convert the band-gap reference voltage to the output voltage.