×

Trench MOSFET device and the preparation method thereof

  • US 10,665,551 B2
  • Filed: 06/21/2018
  • Issued: 05/26/2020
  • Est. Priority Date: 06/30/2016
  • Status: Active Grant
First Claim
Patent Images

1. A method for fabricating a trench metal-oxide-semiconductor field-effect transistor (MOSFET) device, the method comprising the steps of:

  • providing a semiconductor substrate of a first conductivity type;

    forming a plurality of first trenches arranged side by side in a first stripe layout extending along a first direction in a first preset area of the semiconductor substrate;

    forming a plurality of second trenches arranged side by side in a second stripe layout extending along a second direction perpendicular to the first direction in a second preset area of the semiconductor substrate;

    filling the plurality of first trenches and the plurality of second trenches with a conductive material so as to form a plurality of control gates;

    implanting dopant of a second conductivity type on a top portion of the semiconductor substrate to form a body region; and

    implanting dopant of the first conductivity type on a top portion of the body region to form a source region;

    before the step of filling the plurality of first trenches and the plurality of second trenches with the conductive material,covering a first insulation layer over a bottom surface and sidewalls of each of the plurality of first trenches and the plurality of second trenches;

    wherein the step of filling the plurality of first trenches and the plurality of second trenches with the conductive material so as to form the plurality of control gates comprises;

    depositing the conductive material on the semiconductor substrate so the plurality of first trenches and the plurality of second trenches are filled with the conductive material; and

    etching away an excessive portion of the conductive material so that the plurality of control gates are formed from a remaining portion of the conductive material in the plurality of first trenches and the plurality of second trenches;

    after the step of implanting dopant of the first conductivity type on the top portion of the body region to form the source region,forming a passivation layer on the plurality of control gate in the plurality of first trenches and the plurality of second trenches and on the semiconductor substrate;

    etching the passivation layer to form a plurality of stripe contact trenches penetrating the passivation layer, the source region and an upper portion of the body region; and

    filling the plurality of stripe contact trenches with another metal material;

    wherein the stripe contact trenches are formed between adjacent first trenches of the plurality of first trenches and between adjacent second trenches of the plurality of second trenches.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×