Switching regulator with proportional-integral (PI) control compensation network clamp

• US 10,666,139 B1
• Filed: 02/27/2019
• Issued: 05/26/2020
• Est. Priority Date: 02/27/2019
• Status: Active Grant

• Current Assignee: Analog Devices International Unlimited Company (Analog Devices, Inc.)
• Original Assignee: Analog Devices International Unlimited Company (Analog Devices, Inc.)
• Inventors: Zhang, Bin
• Primary Examiner(s): Moody, Kyle J
• Assistant Examiner(s): Novak, Peter M
• Application Number:
  US16/287,887
• Time in Patent Office: 454 Days
• Field of Search: 323174, 323299, 323282, 323384
• CPC Class Codes: H02M 1/0009 Devices or circuits for detecting current in a converter
• CPC Class Codes: H02M 1/0025 Arrangements for modifying reference values, feedback values or error values in the control loop of a converter
• CPC Class Codes: H02M 3/156 with automatic control of output voltage or current, e.g. switching regulators
• CPC Class Codes: H02M 3/1566 with means for compensating against rapid load changes, e.g. with auxiliary current source, with dual mode control or with inductance variation

Abstract

During a load transient or load current step, an error amplifier of a regulator circuit can be temporarily pushed to saturation and a compensation capacitor can be discharged. The present inventor has recognized, among other things, that the transient response performance in such a case can suffer due to the slow rising rate of the error amplifier caused by the slow charging of the compensation capacitor. Using various techniques, a switching regulator circuit can include a proportional-integral (PI) compensation network clamp circuit that can provide a fast system transient response and a low quiescent current, which can reduce power consumption.

Claims

1. A switching regulator circuit to supply a current at a regulated voltage to an output node coupled to a load, the switching regulator circuit comprising:

a power stage circuit configured to supply the current to the output node, the power stage circuit including an inductor and a switch circuit and coupled between an input node and the output node;

an error amplifier circuit configured to receive a representation of an output node voltage and generate a current control signal to maintain the output node at the regulated voltage by controlling an inductor current;

a compensation network coupled to an output node of the error amplifier circuit, the compensation network including at least one resistor and at least one capacitor, the at least one resistor electrically coupled to the output node of the error amplifier circuit and a control node, the at least one capacitor electrically coupled between the control node and ground;

a unidirectional clamp circuit coupled to the control node, the unidirectional clamp circuit configured to permit a voltage at the control node to move when the voltage at the control node is higher than a reference voltage and otherwise inhibit the voltage at the control node from moving below the reference voltage; and

a control circuit configured to receive the current control signal and control the inductor current using the current control signal.

2. The switching regulator circuit of claim 1, wherein the clamp circuit is activated when the error amplifier circuit attempts to move the voltage at the control node lower than the reference voltage.

3. The switching regulator circuit of claim 1, wherein the reference voltage is configured to be set equal to a voltage of the current control signal that sets a peak inductor current to zero amps.

4. The switching regulator circuit of claim 3, wherein the resistance of the at least one resistor is configured to limit a DC quiescent current of the error amplifier when the control signal is pulled to ground.

5. The switching regulator circuit of claim 1, wherein the reference voltage is configured to be set equal to a voltage of the current control signal that sets a peak inductor current to be greater than zero amps.

6. The switching regulator circuit of claim 5, wherein the compensation network is set to proportional (P) control only and integral (I) control disabled when the current control signal voltage is lower than the reference voltage.

7. The switching regulator circuit of claim 5, wherein the compensation network is set to Proportional-Integral (PI) control when the current control signal voltage is higher than the reference voltage.

8. The switching regulator circuit of claim 5, wherein the reference voltage is configured to be set lower than a voltage at which the current control signal can still be pulled low enough to maintain the inductor current at zero amps by the error amplifier, through a voltage drop across the resistor in the compensation network, at light load or zero load.

9. The switching regulator circuit of claim 1, further comprising:

a comparator with input hysteresis, the comparator configured to compare the current control signal to a threshold voltage and generate a clamp control signal to adjust the clamp circuit.

10. The switching regulator circuit of claim 9, wherein the threshold voltage is configured to be set equal to a voltage of the current control signal that sets a peak inductor current to zero amps.

11. The switching regulator circuit of claim 9, wherein the threshold voltage is configured to be set lower than a voltage of the current control signal that sets a peak inductor current to zero amps.

12. The switching regulator circuit of claim 9, wherein the comparator is configured to generate the clamp control signal to disable the clamp circuit if the clamp control signal is at a first logic level, and to enable the clamp circuit if the clamp control signal is at a second logic level.

13. A method of operating a switching regulator circuit to supply a current at a regulated voltage to an output node coupled to a load, the method comprising:

supplying the current to the output node, the power stage circuit including an inductor and a switch circuit and coupled between an input node and the output node;

receiving a representation of an output node voltage and generating a current control signal to maintain the output node at the regulated voltage by controlling an inductor current;

clamping, a control node in a compensation network to a reference voltage, the compensation network including at least one resistor and at least one capacitor, the at least one resistor electrically coupled to the output node of the error amplifier circuit and the control node, the at least one capacitor electrically coupled between the control node and ground, wherein clamping the control node includes permitting a voltage at the control node to move when the voltage at the control node is higher than a reference voltage and clamping the voltage at the control node to the reference voltage in response to the error amplifier circuit attempting to move the voltage at the control node lower than the reference voltage; and

controlling the inductor current using the current control signal.

14. The method of claim 13, further comprising:

deactivating a clamp circuit when the voltage at the control node is higher than the reference voltage; and

activating the clamp circuit when the error amplifier circuit attempts to move the control node to a voltage that is lower than the reference voltage.

15. The method of claim 13, further comprising:

setting the reference voltage equal to a voltage of the current control signal that sets a peak inductor current to zero amps.

16. The method of claim 13, further comprising:

setting the reference voltage equal to a voltage of the current control signal that sets a peak inductor current to be greater than zero amps.

17. The method of claim 16, further comprising:

setting the compensation network to proportional (P) control only and integral (I) control disabled when the current control signal voltage is lower than the reference voltage.

18. The method of claim 16, further comprising:

setting the compensation network to Proportional-Integral (PI) control when the current control signal voltage is higher than the reference voltage.

19. A switching regulator circuit to supply a current at a regulated voltage to an output node coupled to a load, the switching regulator circuit comprising:

a power stage circuit configured to supply the current to the output node, the power stage circuit including an inductor and a switch circuit and coupled between an input node and the output node;

an error amplifier circuit configured to receive a representation of an output node voltage and generate a current control signal to maintain the output node at the regulated voltage by controlling an inductor current;

means for clamping a control node in a compensation network to a reference voltage, the compensation network including at least one resistor and at least one capacitor, the at least one resistor electrically coupled to the output node of the error amplifier circuit and the control node, the at least one capacitor electrically coupled to the control node and ground, wherein the means for unidirectionally clamping the control node is configured to permit a voltage at the control node to move when the voltage at the control node is higher than a reference voltage and clamp the voltage at the control node to the reference voltage in response to the error amplifier circuit attempting to move the voltage at the control node lower than the reference voltage; and

means for controlling the inductor current using the current control signal.

20. The switching regulator circuit of claim 19, wherein the means for clamping the control node in the compensation network to the reference voltage includes:

means for permitting a voltage at the control node to move when the voltage at the control node is higher than the reference voltage; and

means for clamping the voltage at the control node to the reference voltage when the voltage at the control node attempts to move to a voltage that is lower than the reference voltage.