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Synchronized parallel tile computation for large area lithography simulation

  • US 10,671,052 B2
  • Filed: 01/10/2018
  • Issued: 06/02/2020
  • Est. Priority Date: 11/15/2017
  • Status: Active Grant
First Claim
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1. A method for lithography simulation, the method comprising:

  • receiving a simulation box of an IC design layout by a first worker machine, the simulation box including a first transition region, the first transition region covering a pixel, the pixel also being covered by one or more second transition regions processed by one or more second worker machines;

    computing a first pixel value of the pixel to simulate a first stage of a lithography process;

    receiving one or more second pixel values that have been computed for the pixel by the one or more second worker machines interacting with the first worker machine; and

    computing an updated pixel value of the pixel to simulate a second stage of the lithography process based on a weighted combination of the first pixel value and the one or more second pixel values.

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