Amorphous metal hot electron transistor

• US 10,672,898 B2
• Filed: 07/07/2017
• Issued: 06/02/2020
• Est. Priority Date: 07/07/2016
• Status: Active Grant

• Current Assignee: Amorphyx, Inc.
• Original Assignee: Amorphyx, Inc.
• Inventors: Muir, Sean William
• Primary Examiner(s): Geyer, Scott B
• Application Number:
  US16/309,804
• Publication Number:
  US 20190318926A1
• Time in Patent Office: 1,061 Days
• CPC Class Codes: G02F 1/13439 characterised by their electrical, optical, physical properties; materials therefor; method of making
• CPC Class Codes: H01L 21/76832 Multiple layers
• CPC Class Codes: H01L 21/76838 characterised by the formation and the after-treatment of the conductors etching for patterning the conductors H01L21/3213
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 29/04 characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes characterised by physical imperfections H01L29/30
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/66931 BJT-like unipolar transistors, e.g. hot electron transistors [HET], metal base transistors [MBT], resonant tunneling transistor [RTT], bulk barrier transistor [BBT], planar doped barrier transistor [PDBT], charge injection transistor [CHINT]
• CPC Class Codes: H01L 29/7606 Transistor-like structures, e.g. hot electron transistor [HET]; metal base transistor [MBT]
• CPC Class Codes: H10N 70/00 Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching integrated devices or assemblies of multiple devices H10N79/00
• CPC Class Codes: H10N 97/00 Electric solid-state thin-film or thick-film devices, not otherwise provided for

Abstract

Amorphous multi-component metallic films can be used to improve the performance of electronic devices such as resistors, diodes, and thin film transistors. An amorphous hot electron transistor (HET) having co-planar emitter and base electrodes provides electrical properties and performance advantages over existing vertical HET structures. Emitter and the base terminals of the transistor are both formed in an upper crystalline metal layer of an amorphous nonlinear resistor. The emitter and the base are adjacent to one another and spaced apart by a gap. The presence of the gap results in two-way Fowler-Nordheim tunneling between the crystalline metal layer and the amorphous metal layer, and symmetric I-V performance. Meanwhile, forming the emitter and base terminals in the same layer simplifies the HET fabrication process by reducing the number of patterning steps.

Claims

1. A device, comprising:

a non-conducting substrate;

an amorphous metal layer on the non-conducting substrate;

a tunneling dielectric layer on the amorphous metal layer;

a first electrode and a second electrode on the tunneling dielectric layer, each overlapping the amorphous metal layer;

a second dielectric layer on the first and second electrodes; and

a third electrode on the second dielectric layer, the third electrode overlapping the second electrode and the amorphous metal layer, the first and second electrodes being between the third electrode and the amorphous metal layer.

2. The device of claim 1 wherein the first and second electrodes are a crystalline metal on the tunneling dielectric layer.

3. The device of claim 1 wherein the first electrode is a first conductive material and the second electrode is a second conductive material that is different from the first conductive material.

4. The device of claim 1 wherein the first electrode and the second electrode are the same conductive material.

5. The device of claim 1 wherein the tunneling dielectric layer includes a metal oxide or a metal nitride.

6. The device of claim 1 wherein the first electrode has a first thickness and the second electrode has a second thickness that is different from the first thickness.

7. The device of claim 1 wherein the tunneling dielectric layer includes a recess and the second electrode is in the recess.

8. The device of claim 7 wherein the recess overlaps and is aligned with the amorphous metal layer.

9. The device of claim 1 wherein the amorphous metal layer has a longest dimension along a first direction, the first and second electrodes have a longest dimension along a second direction that is transverse to the first direction.

10. The device of claim 1, further comprising a first terminal coupled to the first electrode and a second terminal coupled to the second electrode.

11. The device of claim 10 wherein the first terminal couples to the first electrode through the second dielectric layer and the second terminal couples to the second electrode through the second dielectric layer.

12. A device, comprising:

a substrate;

an amorphous metal layer on the substrate, the amorphous metal layer having a length extending along a first direction and a width extending along a second direction that is transverse to the first direction;

a tunneling oxide layer on the amorphous metal layer;

an emitter electrode on the tunneling oxide layer, the emitter electrode overlapping a first portion of the amorphous metal layer, the emitter electrode having a length extending along the second direction and a width extending along the first direction;

a base electrode on the tunneling oxide layer, the base electrode overlapping a second portion of the amorphous metal layer, the base electrode having a length extending along the second direction and a width extending along the first direction;

an insulator on the emitter electrode and the base electrode; and

a collector electrode on the insulator, the collector electrode overlapping the base electrode and the second portion of the amorphous metal layer.

13. The device of claim 12 wherein the collector electrode has a length extending along the first direction and a width extending along the second direction, the width being smaller than the length.

14. The device of claim 12 wherein the length of the emitter electrode is greater than the width of the emitter electrode and the length of the base electrode is greater than the width of the base electrode.

15. A device, comprising:

a substrate;

an amorphous metal layer on the substrate;

a first insulator on the amorphous metal layer;

a first electrode on the first insulator and overlapping a first portion of the amorphous metal layer;

a second electrode on the first insulator and overlapping a second portion of the amorphous metal layer;

a second insulator;

a first contact through the second insulator and coupled to the first electrode;

a second contact through the second insulator and coupled to the second electrode; and

a third electrode on the second insulator and overlapping the second portion of the amorphous metal layer.

16. The device of claim 15, further comprising:

a fourth electrode on the second insulator and overlapping the first portion of the amorphous metal layer.

17. The device of claim 15 wherein the first electrode is thicker than the second electrode.

18. The device of claim 15, further comprising a third insulator between the first insulator and the first and second electrodes.

19. The device of claim 18, further comprising a first opening in the third insulator at the first portion of the amorphous metal layer and a second opening in the third insulator at the second portion of the amorphous metal layer.

20. A device, comprising:

a non-conducting substrate;

an amorphous metal layer on the non-conducting substrate;

a tunneling dielectric layer on the amorphous metal layer;

a first electrode and a second electrode on the tunneling dielectric layer, each overlapping the amorphous metal layer;

a second dielectric layer on the first and second electrodes; and

a third electrode on the second dielectric layer, the third electrode overlapping the second electrode and the amorphous metal layer,

wherein a thickness of a first portion of the tunneling dielectric layer between the first electrode and the amorphous metal layer is greater than a thickness of a second portion of the tunneling dielectric layer between the second electrode and the amorphous metal layer.

21. The device of claim 20, further comprising a first contact coupled to the first electrode and a second contact coupled to the second electrode.