Clock circuit and method for recalibrating an injection oscillator coupled to kick-start a crystal oscillator
First Claim
1. A clock circuit, comprising:
- a crystal oscillator circuit configured to generate a clock signal at a resonant frequency;
an injection oscillator coupled to supply an oscillation signal at an injection frequency to the crystal oscillator circuit to reduce a start-up time of the crystal oscillator circuit; and
a digital frequency calibration circuit coupled to receive the resonant frequency and the injection frequency as inputs, and configured to supply a digital control signal to the injection oscillator to set the injection frequency of the injection oscillator substantially equal to the resonant frequency of the crystal oscillator circuit;
wherein the digital frequency calibration circuit comprises a digital up/down counter coupled to receive the resonant frequency and the injection frequency; and
wherein the digital up/down counter is configured to generate a first digital signal based upon an increasing count value and a decreasing count value corresponding to the injection frequency as measured by the resonant frequency.
1 Assignment
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Accused Products
Abstract
Embodiments of clock circuits disclosed herein include a crystal oscillator circuit, an injection oscillator coupled to kick-start the crystal oscillator circuit and a digital frequency calibration circuit coupled to recalibrate the injection oscillator. The crystal oscillator circuit is configured to generate a clock signal at a resonant frequency. The injection oscillator is coupled to supply an oscillation signal at an injection frequency to the crystal oscillator circuit to reduce a start-up time of the crystal oscillator circuit. The digital frequency calibration circuit is coupled to receive the resonant frequency and the injection frequency as inputs, and configured to supply a digital control signal to the injection oscillator to set the injection frequency of the injection oscillator substantially equal to the resonant frequency of the crystal oscillator circuit. Methods are provided herein to recalibrate the injection frequency of an injection oscillator over time, temperature and/or supply voltage.
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Citations
20 Claims
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1. A clock circuit, comprising:
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a crystal oscillator circuit configured to generate a clock signal at a resonant frequency; an injection oscillator coupled to supply an oscillation signal at an injection frequency to the crystal oscillator circuit to reduce a start-up time of the crystal oscillator circuit; and a digital frequency calibration circuit coupled to receive the resonant frequency and the injection frequency as inputs, and configured to supply a digital control signal to the injection oscillator to set the injection frequency of the injection oscillator substantially equal to the resonant frequency of the crystal oscillator circuit; wherein the digital frequency calibration circuit comprises a digital up/down counter coupled to receive the resonant frequency and the injection frequency; and wherein the digital up/down counter is configured to generate a first digital signal based upon an increasing count value and a decreasing count value corresponding to the injection frequency as measured by the resonant frequency. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A clock circuit, comprising:
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a crystal oscillator circuit configured to generate a clock signal at a resonant frequency; an injection oscillator coupled to supply an oscillation signal at an injection frequency to the crystal oscillator circuit to reduce a start-up time of the crystal oscillator circuit; and a digital frequency calibration circuit coupled to receive the resonant frequency and the injection frequency as inputs, and configured to supply a digital control signal to the injection oscillator to set the injection frequency of the injection oscillator substantially equal to the resonant frequency of the crystal oscillator circuit; wherein the digital frequency calibration circuit further comprises a subtractor coupled to an output of the digital up/down counter, wherein the subtractor is configured to generate a second digital signal corresponding to a difference between the first digital signal and a target count value supplied to the subtractor. - View Dependent Claims (9, 10)
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11. A clock circuit, comprising:
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a crystal oscillator circuit configured to generate a clock signal at a resonant frequency; an injection oscillator coupled to supply an oscillation signal at an injection frequency to the crystal oscillator circuit to reduce a start-up time of the crystal oscillator circuit; and a digital frequency calibration circuit coupled to receive the resonant frequency and the injection frequency as inputs, and configured to supply a digital control signal to the injection oscillator to set the injection frequency of the injection oscillator substantially equal to the resonant frequency of the crystal oscillator circuit; wherein the injection oscillator comprises an RC oscillator including a variable capacitor and a variable resistor, wherein a capacitance of the variable capacitor is controlled by a first set of trim bits, and wherein a resistance of the variable resistor is controlled by a second set of trim bits; and wherein one of the first and second sets of trim bits is determined either during factory calibration and stored within non-volatile memory or by the digital frequency calibration circuit each time the clock circuit is started, and wherein the other of the first and second set of trim bits is supplied to the injection oscillator as the digital control signal.
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12. A method for recalibrating an injection frequency supplied by an injection oscillator to a crystal oscillator circuit, the method comprising:
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receiving the injection frequency of the injection oscillator and a resonant frequency of the crystal oscillator circuit; increasing a first count value for each pulse of the injection frequency received during the receiving step, decreasing a second count value for each pulse of the resonant frequency received during the receiving step, and outputting the first count value when the second count value reaches zero; subtracting a target count value from the first count value to generate a count difference; multiplying the count difference by a gain term to generate an adjustment term; generating an updated digital control signal by adding the adjustment term to a digital control signal previously supplied to the injection oscillator to control the injection frequency; and supplying the updated digital control signal to the injection oscillator to recalibrate the injection frequency, so that the injection frequency of the injection oscillator is substantially equal to the resonant frequency of the crystal oscillator circuit. - View Dependent Claims (13, 14, 15)
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16. A transceiver circuit, comprising:
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a clock circuit coupled to generate a clock signal, the clock signal comprising; a crystal oscillator circuit configured to generate a clock signal at a resonant frequency; an injection oscillator coupled to supply an oscillation signal at an injection frequency to the crystal oscillator circuit to reduce a start-up time of the crystal oscillator circuit; and a digital frequency calibration circuit coupled to receive the resonant frequency and the injection frequency as inputs, and configured to supply a digital control signal to the injection oscillator to set the injection frequency of the injection oscillator substantially equal to the resonant frequency of the crystal oscillator circuit; wherein the digital frequency calibration circuit comprises; a digital up/down counter, which is coupled to receive the resonant frequency and the injection frequency and configured to generate a first digital signal corresponding to the injection frequency as measured by the resonant frequency; a subtractor, which is coupled to an output of the digital up/down counter and configured to generate a second digital signal corresponding to a difference between the first digital signal and a target count value supplied to the subtractor; a multiplier, which is coupled to an output of the subtractor and configured to generate a third digital signal by multiplying the second digital signal by a gain term supplied to the multiplier; and an adder, which is coupled to an output of the multiplier and configured to update the digital control signal by adding the third digital signal to the digital control signal; and a local oscillator coupled to receive the clock signal generated by the clock circuit and configured to use the clock signal as a reference clock signal for generating one more local clock signals. - View Dependent Claims (17, 18, 19, 20)
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Specification