Method and apparatus for bus lock assistance
First Claim
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1. A method comprising:
- detecting that a first instruction and a second instruction are locked instructions;
determining that execution of the first instruction and the second instruction each include imposing an initial bus lock; and
executing a bus lock assistance function in response to the determining, wherein the bus lock assistance function comprises;
preventing the initial bus lock from being imposed for the first instruction by raising a flag to cause execution of software including the first instruction to stop,permitting the initial bus lock to be imposed for the second instruction, andtriggering a save of state information for the second instruction to memory.
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Abstract
A method is described that includes detecting that an instruction of a thread is a locked instruction. The instruction also includes determining that execution of said instruction includes imposing a bus lock. The instruction also include executing a bus lock assistance function in response to said determining, said bus lock assistance function including a function associated with said bus lock other than implementation of a bus lock protocol.
11 Citations
25 Claims
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1. A method comprising:
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detecting that a first instruction and a second instruction are locked instructions; determining that execution of the first instruction and the second instruction each include imposing an initial bus lock; and executing a bus lock assistance function in response to the determining, wherein the bus lock assistance function comprises; preventing the initial bus lock from being imposed for the first instruction by raising a flag to cause execution of software including the first instruction to stop, permitting the initial bus lock to be imposed for the second instruction, and triggering a save of state information for the second instruction to memory. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. An apparatus comprising:
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instruction identification circuitry to identify when a first instruction and a second instruction are locked instructions; first circuitry to determine if the first instruction and the second instruction are each to impose an initial bus lock when executed; and second circuitry to trigger a bus lock assistance function when the first instruction and the second instruction are to each impose the initial bus lock when executed, wherein the bus lock assistance function is to; prevent the initial bus lock from being imposed for the first instruction by raising a flag to cause execution of software including the first instruction to stop, permit the initial bus lock to be imposed for the second instruction, and trigger a save of state information for the second instruction to memory. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 17, 18)
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19. A non-transitory machine readable medium containing program instructions that when processed by a processing core causes a method to be performed, the method comprising:
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detecting that a first instruction and a second instruction are locked instructions; determining that execution of the first instruction and the second instruction includes imposing an initial bus lock; and executing a bus lock assistance function in response to the determining, wherein the bus lock assistance function comprises; preventing the initial bus lock from being imposed for the first instruction by raising a flag to cause execution of software including the first instruction to stop, permitting the initial bus lock to be imposed for the second instruction, and triggering a save of state information for the second instruction to memory. - View Dependent Claims (20, 21, 22, 23, 24, 25)
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Specification