Differing device characteristics on a single wafer by selective etch
First Claim
1. A method of forming an integrated chip, comprising:
- etching a first stack of layers in a first region, the first stack of layers comprising a first semiconductor layer having a first thickness over a first sacrificial layer having a second thickness, to remove the first sacrificial layer from the first stack of layers and to create a first gap;
etching a second stack of layers in a second region, the second stack of layers comprising a second semiconductor layer having a third thickness over a second sacrificial layer having a fourth thickness, different from the second thickness, to remove the second sacrificial layer from the second stack of layers and to create a second gap; and
depositing a dielectric material that fills the first gap and the second gap.
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Accused Products
Abstract
Integrated chips and methods of forming the same include etching a first stack of layers in a first region and etching a second stack of layers in a second region. The first stack of layers includes a first semiconductor layer having a first thickness over a first sacrificial layer having a second thickness. Etching the first stack of layers removes the first sacrificial layer from the first stack of layers and creates a first gap. The second stack of layers includes a second semiconductor layer having a third thickness over a second sacrificial layer having a fourth thickness. Etching the second stack of layers removes the second sacrificial layer from the second stack of layers and to create a second gap. A dielectric material fills the first gap and the second gap.
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Citations
20 Claims
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1. A method of forming an integrated chip, comprising:
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etching a first stack of layers in a first region, the first stack of layers comprising a first semiconductor layer having a first thickness over a first sacrificial layer having a second thickness, to remove the first sacrificial layer from the first stack of layers and to create a first gap; etching a second stack of layers in a second region, the second stack of layers comprising a second semiconductor layer having a third thickness over a second sacrificial layer having a fourth thickness, different from the second thickness, to remove the second sacrificial layer from the second stack of layers and to create a second gap; and depositing a dielectric material that fills the first gap and the second gap. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method of forming an integrated chip, comprising:
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forming, in a first trench in a first region, a first stack of layers that includes a first semiconductor layer having a first thickness over a first sacrificial layer having a second thickness; forming, in a second trench in a second region, a first stack of layers that includes a second semiconductor layer having a third thickness over a second sacrificial layer having a fourth thickness; etching the first stack of layers to remove the first sacrificial layer from the first stack of layers and to create a first gap; etching the second stack of layers to remove the second sacrificial layer from the second stack of layers and to create a second gap; and depositing a dielectric material that fills the first gap and the second gap. - View Dependent Claims (12, 13, 14, 15, 17, 18, 19, 20)
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16. A method of forming an integrated chip, comprising:
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forming a passivating layer around a first stack of layers and a second stack of layers, wherein the first stack of layers includes a first semiconductor layer having a first thickness over a first sacrificial layer having a second thickness, and wherein the second stack of layers includes a second semiconductor layer having a third thickness over a second sacrificial layer having a fourth thickness; performing a fin cut to expose ends of the first stack of layers and the second stack of layers after forming the passivating layer; etching a first stack of layers in a first region, after forming the passivating layer, to remove the first sacrificial layer from the first stack of layers and to create a first gap; etching a second stack of layers in a second region, after forming the passivating layer, to remove the second sacrificial layer from the second stack of layers and to create a second gap; and depositing a dielectric material that fills the first gap and the second gap.
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Specification