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Differing device characteristics on a single wafer by selective etch

  • US 10,679,901 B2
  • Filed: 08/14/2018
  • Issued: 06/09/2020
  • Est. Priority Date: 08/14/2018
  • Status: Active Grant
First Claim
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1. A method of forming an integrated chip, comprising:

  • etching a first stack of layers in a first region, the first stack of layers comprising a first semiconductor layer having a first thickness over a first sacrificial layer having a second thickness, to remove the first sacrificial layer from the first stack of layers and to create a first gap;

    etching a second stack of layers in a second region, the second stack of layers comprising a second semiconductor layer having a third thickness over a second sacrificial layer having a fourth thickness, different from the second thickness, to remove the second sacrificial layer from the second stack of layers and to create a second gap; and

    depositing a dielectric material that fills the first gap and the second gap.

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