Semiconductor device having an active trench and a body trench
First Claim
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1. A semiconductor device, comprising:
- a semiconductor substrate having a first main surface and a second main surface opposite the first main surface;
a first region of a first conductivity type formed in the semiconductor substrate;
a second region of a second conductivity type opposite the first conductivity type formed in the semiconductor substrate above the first region;
a third region of the second conductivity type formed in the semiconductor substrate adjacent to the second main surface;
an active gate trench extending from the first main surface and into the second region, the active gate trench including a first electrode coupled to a gate potential;
a fourth region of the first conductivity type formed in the second region adjacent to the gate trench and coupled to an electric potential different than the gate potential;
a first body trench extending from the first main surface and into the second region, the first body trench including a second electrode coupled to the electric potential different than the gate potential; and
an inactive gate trench extending from the first main surface and into the second region, the inactive gate trench including a third electrode coupled to the gate potential,wherein a conductive channel is present along the active gate trench in case of the gate potential being at an on-voltage of the semiconductor device,wherein no conductive channel is present along the inactive gate trench in case of the gate potential being at the on-voltage.
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Abstract
A semiconductor device is described in which a conductive channel is present along an active gate trench of the device when a gate potential is at an on-voltage, whereas no conductive channel is present along an inactive gate trench of the device for the same gate potential condition.
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Citations
24 Claims
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1. A semiconductor device, comprising:
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a semiconductor substrate having a first main surface and a second main surface opposite the first main surface; a first region of a first conductivity type formed in the semiconductor substrate; a second region of a second conductivity type opposite the first conductivity type formed in the semiconductor substrate above the first region; a third region of the second conductivity type formed in the semiconductor substrate adjacent to the second main surface; an active gate trench extending from the first main surface and into the second region, the active gate trench including a first electrode coupled to a gate potential; a fourth region of the first conductivity type formed in the second region adjacent to the gate trench and coupled to an electric potential different than the gate potential; a first body trench extending from the first main surface and into the second region, the first body trench including a second electrode coupled to the electric potential different than the gate potential; and an inactive gate trench extending from the first main surface and into the second region, the inactive gate trench including a third electrode coupled to the gate potential, wherein a conductive channel is present along the active gate trench in case of the gate potential being at an on-voltage of the semiconductor device, wherein no conductive channel is present along the inactive gate trench in case of the gate potential being at the on-voltage. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A semiconductor device, comprising:
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a semiconductor substrate having a first main surface and a second main surface opposite the first main surface; a first region of a first conductivity type formed in the semiconductor substrate; a second region of a second conductivity type opposite the first conductivity type formed in the semiconductor substrate above the first region; a third region of the second conductivity type formed in the semiconductor substrate adjacent to the second main surface; and a transistor cell comprising; an active gate trench extending from the first main surface and into the second region, the active gate trench including a first electrode coupled to a gate potential; a fourth region of the first conductivity type formed in the second region adjacent to the gate trench and coupled to an electric potential different than the gate potential; a first body trench extending from the first main surface and into the second region, the first body trench including a second electrode coupled to the electric potential different than the gate potential; and an inactive gate trench extending from the first main surface and into the second region, the inactive gate trench including a third electrode coupled to the gate potential, wherein a conductive channel of the transistor cell is present along the active gate trench in case of the gate potential being at an on-voltage of the semiconductor device, wherein no conductive channel of the transistor cell is present along the inactive gate trench in case of the gate potential being at the on-voltage. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24)
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Specification