MOSFET device and fabrication

• US 10,680,097 B2
• Filed: 09/08/2017
• Issued: 06/09/2020
• Est. Priority Date: 08/14/2009
• Status: Active Grant

• Current Assignee: Alpha & Omega Semiconductor, Ltd.
• Original Assignee: Alpha & Omega Semiconductor, Ltd.
• Inventors: Chen, John, Lee, Il Kwan, Chang, Hong, Li, Wenjun, Bhalla, Anup, Yilmaz, Hamza
• Primary Examiner(s): Carpenter, Robert K
• Application Number:
  US15/699,966
• Publication Number:
  US 20170373186A1
• Time in Patent Office: 1,005 Days
• Field of Search: None
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/42372 characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out H01L29/42324 takes precedence
• CPC Class Codes: H01L 29/4238 characterised by the surface lay-out
• CPC Class Codes: H01L 29/66719 With a step of forming an insulating sidewall spacer
• CPC Class Codes: H01L 29/66727 with a step of recessing the source electrode
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A semiconductor device, comprising: a substrate; an active gate trench in the substrate; a source polysilicon pickup trench in the substrate; a polysilicon electrode disposed in the source polysilicon pickup trench; a gate pickup trench in the substrate; a first conductive region and a second conductive region disposed in the gate pickup trench, the first conductive region and the second conductive region being separated by oxide, wherein at least a portion of the oxide surrounding the first conductive region in the gate pickup trench is thicker than at least a portion of the oxide under the second conductive region; and a body region in the substrate.

Claims

1. A semiconductor device, comprising:

a substrate;

an active gate trench in the substrate;

a source polysilicon pickup trench in the substrate;

a polysilicon electrode disposed in the source polysilicon pickup trench;

a gate pickup trench in the substrate;

a first conductive region and a second conductive region disposed in the gate pickup trench, the first conductive region and the second conductive region being separated by oxide, wherein;

oxide surrounding a side wall of the first conductive region in the gate pickup trench is thicker than oxide surrounding a side wall of the second conductive region; and

the first conductive region is above the second conductive region; and

a body region in the substrate.

2. The semiconductor device of claim 1, further comprising a contact hole filled with a metal conductor extending from the polysilicon electrode to a source metal layer deposited on a top side of the semiconductor device.

3. The semiconductor device of claim 2, wherein the contact hole is narrower in width than the polysilicon electrode.

4. The semiconductor device of claim 1, wherein the source polysilicon pickup trench is deeper than the active gate trench.

5. The semiconductor device of claim 1, wherein the source polysilicon pickup trench is narrower than the active gate trench.

6. The semiconductor device of claim 1, wherein the first conductive region includes a gate polysilicon region.

7. The semiconductor device of claim 1, wherein the second conductive region includes a source/shield polysilicon region.