Power supply circuit

• US 10,680,514 B2
• Filed: 07/30/2019
• Issued: 06/09/2020
• Est. Priority Date: 08/10/2018
• Status: Active Grant

• Current Assignee: Ablic Inc. (Minebea Mitsumi, Inc.)
• Original Assignee: Ablic Inc. (Minebea Mitsumi, Inc.)
• Inventors: Watanabe, Kotaro
• Primary Examiner(s): Zweizig, Jeffery S
• Application Number:
  US16/526,484
• Publication Number:
  US 20200052584A1
• Time in Patent Office: 315 Days
• Field of Search: None
• CPC Class Codes: H02J 9/005 using a power saving mode for copiers G03G15/5004
• CPC Class Codes: H02J 9/061 for DC powered loads
• CPC Class Codes: H02M 1/0025 Arrangements for modifying reference values, feedback values or error values in the control loop of a converter
• CPC Class Codes: H02M 1/0032 Control circuits allowing low power mode operation, e.g. in standby mode
• CPC Class Codes: H02M 1/0045 Converters combining the concepts of switch-mode regulation and linear regulation, e.g. linear pre-regulator to switching converter, linear and switching converter in parallel, same converter or same transistor operating either in linear or switching mode
• CPC Class Codes: H02M 3/07 using capacitors charged and discharged alternately by semiconductor devices with control electrode , e.g. charge pumps
• CPC Class Codes: H02M 3/156 with automatic control of output voltage or current, e.g. switching regulators
• CPC Class Codes: H03K 17/6871 the output circuit comprising more than one controlled field-effect transistor

Abstract

A power supply circuit including an input terminal, an output terminal, a power output circuit, and a mode selection circuit. In the power supply circuit, the mode selection circuit is configured to supply a signal indicating whether the power output circuit is operated as a charge pump-type power output circuit or a series regulator-type power output circuit, and a voltage applied from the input terminal is stepped up or down by the power output circuit and then provided to the output terminal.

Claims

1. A power supply circuit comprising:

a mode selection circuit;

an input terminal;

an output terminal; and

a power output circuit configured to operate in one of a first mode and a second mode based on a signal from the mode selection circuit, the power output circuit including a first transistor and a second transistor which are connected in series between the input terminal and the output terminal, a third transistor and a fourth transistor which are connected in series between the input terminal and a ground terminal, a first capacitor connected between a first connection point between the first transistor and the second transistor and a second connection point between the third transistor and the fourth transistor, a second capacitor connected between the output terminal and the ground terminal, a control circuit configured to supply each control signal to each of the first to fourth transistors in the first mode and supply a control signal which switches on the second transistor and switches off the third and fourth transistors in the second mode, and an error amplifier circuit configured to compare a reference voltage and a voltage obtained by dividing a voltage between the output terminal and the ground terminal, the error amplifier circuit containing an output port which is connected to the control circuit in the first mode and to the first transistor in the second mode.

2. A power supply circuit comprising:

a mode selection circuit;

an input terminal;

an output terminal; and

a power output circuit configured to operate in one of a first mode and a second mode based on a signal from the mode selection circuit, the power output circuit including a first transistor and a second transistor which are connected in series between the input terminal and the output terminal, a third transistor and a fourth transistor which are connected in series between the input terminal and a ground terminal, a first capacitor connected between a first connection point between the first transistor and the second transistor and a second connection point between the third transistor and the fourth transistor, a second capacitor connected between the output terminal and the ground terminal, a control circuit configured to supply each control signal to each of the first to fourth transistors in the first mode and supply a control signal which switches off the third and fourth transistors in the second mode, and an error amplifier circuit configured to compare a reference voltage and a voltage obtained by dividing a voltage between the output terminal and the ground terminal and to supply a signal to each of the first and second transistors in the second mode, the error amplifier circuit containing an output port which is connected to the control circuit in the first mode and to the first and second transistors in the second mode.