Integrated circuit device
First Claim
1. An integrated circuit device comprising:
- a substrate comprising a first device region and a second device region;
a first fin separation insulating portion over the first device region;
a pair of first fin-type active regions spaced apart from each other in the first device region, with the first fin separation insulating portion therebetween, a first element of the pair of first fin-type active regions collinearly extending in a first horizontal direction with a second element of the pair of first fin-type active regions;
a first dummy gate structure covering an upper surface of the first fin separation insulating portion to vertically overlap the first fin separation insulating portion, and extending in a second horizontal direction over the first device region, the second horizontal direction crossing the first horizontal direction;
a second fin separation insulating portion spaced apart from the first fin separation insulating portion and arranged over the second device region, and collinearly extending with the first dummy gate structure in the second horizontal direction; and
a plurality of second fm-type active regions spaced apart from each other in the second device region with the second fin separation insulating portion therebetween, the plurality of second fin-type active regions collinearly extending in the first horizontal direction,wherein a vertical level of a lowermost surface of the second fin separation insulating portion is lower than a vertical level of a lowermost surface of the first fin separation insulating portion.
1 Assignment
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Accused Products
Abstract
An integrated circuit device includes a first fin separation insulating portion over the first device region; a pair of first fin-type active regions apart from each other with the first fin separation insulating portion therebetween and collinearly extending in a first horizontal direction; a first dummy gate structure vertically overlapping the first fin separation insulating portion; a second fin separation insulating portion apart from the first fin separation insulating portion and arranged over the second device region; and a plurality of second fin-type active regions apart from each other with the second fin separation insulating portion therebetween in the second device region and collinearly extending in the first horizontal direction, wherein a vertical level of a lowermost surface of the second fin separation insulating portion is equal to or lower than a vertical level of a lowermost surface of the first fin separation insulating portion.
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Citations
20 Claims
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1. An integrated circuit device comprising:
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a substrate comprising a first device region and a second device region; a first fin separation insulating portion over the first device region; a pair of first fin-type active regions spaced apart from each other in the first device region, with the first fin separation insulating portion therebetween, a first element of the pair of first fin-type active regions collinearly extending in a first horizontal direction with a second element of the pair of first fin-type active regions; a first dummy gate structure covering an upper surface of the first fin separation insulating portion to vertically overlap the first fin separation insulating portion, and extending in a second horizontal direction over the first device region, the second horizontal direction crossing the first horizontal direction; a second fin separation insulating portion spaced apart from the first fin separation insulating portion and arranged over the second device region, and collinearly extending with the first dummy gate structure in the second horizontal direction; and a plurality of second fm-type active regions spaced apart from each other in the second device region with the second fin separation insulating portion therebetween, the plurality of second fin-type active regions collinearly extending in the first horizontal direction, wherein a vertical level of a lowermost surface of the second fin separation insulating portion is lower than a vertical level of a lowermost surface of the first fin separation insulating portion. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. An integrated circuit device comprising:
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a substrate comprising a first device region and a second device region; a first fin separation insulating portion in the first device region; a pair of first fin-type active regions spaced apart from each other in the first device region with the first fin separation insulating portion therebetween, one element of the pair of first fin-type active regions collinearly extending in a first horizontal direction with the other element of the pair of first fin-type active regions; a plurality of dummy gate structures extending parallel to each other in a second horizontal direction over the first fin separation insulating portion, the second horizontal direction crossing the first horizontal direction; at least one second fin separation insulating portion spaced apart from the first fin separation insulating portion and arranged over the second device region; and a plurality of second fin-type active regions spaced apart from each other in the second device region with the at least one second fin separation insulating portion therebetween and collinearly extending in the first horizontal direction, wherein a vertical level of a lowermost surface of the at least one second fin separation insulating portion is equal to or lower than a vertical level of a lowermost surface of the first fin separation insulating portion. - View Dependent Claims (12, 13, 14, 15, 16)
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17. An integrated circuit device comprising:
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a substrate comprising a first device region and a second device region spaced apart from each other; a device isolation region between the first device region and the second device region; a first fin separation insulating portion over the first device region; a plurality of pairs of first fm-type active regions in the first device region, each of the plurality of pairs of first fin-type active regions including a first member and a second member, each of the plurality of pairs of first fin-type active regions vertically protruding from the substrate at the first device region, and each of the plurality of pairs of first fin-type active regions having the first member spaced apart from second member with the first fin separation insulating portion therebetween, each of the plurality of pairs having the first member collinearly extending with the second member in a first horizontal direction; a plurality of second fin separation insulating portions extending in a second horizontal direction over the second device region and spaced apart from each other, wherein the second horizontal direction crosses the first horizontal direction; and a plurality of second fin-type active regions vertically protruding from the substrate at the second device region and arranged in a straight line extending in the first horizontal direction across the plurality of second fin separation insulating portions, wherein a vertical level of a lowermost surface of the plurality of second fin separation insulating portions is lower than a vertical level of a lowermost surface of the first fin separation insulating portion. - View Dependent Claims (18, 19, 20)
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Specification