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Method and device for electrical overstress and electrostatic discharge protection

  • US 10,692,854 B2
  • Filed: 03/19/2018
  • Issued: 06/23/2020
  • Est. Priority Date: 03/28/2017
  • Status: Active Grant
First Claim
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1. A semiconductor device, comprising:

  • a signal source;

    a load;

    a transmission line coupled between the signal source and load;

    a series protection circuit electrically coupled in series along the transmission line between the signal source and the load, wherein the series protection circuit includes,a junction field-effect transistor (JFET), anda resistor disposed between the JFET and load, wherein the JFET, resistor, and transmission line are electrically coupled in series between the signal source and load; and

    a parallel protection circuit electrically coupled between the transmission line and a ground node, wherein the parallel protection circuit is directly coupled to a gate terminal of the JFET.

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