pHEMT switch circuits with enhanced linearity performance

• US 10,700,646 B2
• Filed: 01/16/2019
• Issued: 06/30/2020
• Est. Priority Date: 04/21/2016
• Status: Active Grant

• Current Assignee: Skyworks Solutions Incorporated
• Original Assignee: Skyworks Solutions Incorporated
• Inventors: Altunkilic, Fikret, Cebi, Haki, Zhu, Yu, Wei, Cejun, Mason, Jerod F.
• Primary Examiner(s): Nguyen, Khanh V
• Assistant Examiner(s): Nguyen, Khiem D
• Application Number:
  US16/249,422
• Publication Number:
  US 20190149102A1
• Time in Patent Office: 531 Days
• Field of Search: 330277, 330 51, 330251, 330311
• CPC Class Codes: H01L 29/778 with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface H01L29/803 takes precedence
• CPC Class Codes: H03F 1/3205 in field-effect transistor amplifiers
• CPC Class Codes: H03F 2200/228 A measuring circuit being coupled to the input of an amplifier
• CPC Class Codes: H03F 2200/294 the amplifier being a low noise amplifier [LNA]
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2200/72 the amplifier stage being a common gate configuration MOSFET
• CPC Class Codes: H03F 3/193 with field-effect devices H03F3/195 takes precedence
• CPC Class Codes: H03F 3/1935 with junction-FET devices
• CPC Class Codes: H03F 3/245 with semiconductor devices only
• CPC Class Codes: H03K 17/162 without feedback from the output circuit to the control circuit
• CPC Class Codes: H03K 17/687 the devices being field-effect transistors

Abstract

pHEMT-based switch circuits, devices including same, and methods of improving the linearity thereof. In one example, an antenna switch module includes a pHEMT switching circuit connected in series between an input signal terminal and a load terminal, the pHEMT switching circuit including at least one pHEMT configured to produce a first harmonic signal at the load terminal responsive to being driven by an input signal of a fundamental frequency received at the input signal terminal, the first harmonic signal having a first phase, and a gate resistance circuit connected to a gate of the at least one pHEMT and having a resistance value selected to produce a second harmonic signal at the load terminal, the second harmonic signal having a second phase opposite to the first phase.

Claims

1. An antenna switch module comprising:

an input signal terminal;

a load terminal;

a pseudomorphic high electron mobility transistor switching circuit connected in series between the input signal terminal and the load terminal, the pseudomorphic high electron mobility transistor switching circuit including at least one pseudomorphic high electron mobility transistor configured to produce a first harmonic signal at the load terminal responsive to being driven by an input signal of a fundamental frequency received at the input signal terminal, the first harmonic signal having a first phase; and

a gate resistance circuit connected to a gate of the at least one pseudomorphic high electron mobility transistor and having a resistance value selected to produce a second harmonic signal at the load terminal, the second harmonic signal having a second phase opposite to the first phase.

2. The antenna switch module of claim 1 wherein the at least one pseudomorphic high electron mobility transistor includes at least one single-gate pseudomorphic high electron mobility transistor.

3. The antenna switch module of claim 1 wherein the at least one pseudomorphic high electron mobility transistor includes at least one triple-gate pseudomorphic high electron mobility transistor.

4. The antenna switch module of claim 1 further comprising an antenna connected to the load terminal.

8. The antenna switch module of claim 1 wherein the gate resistance circuit includes a plurality of switchable resistors configured to be selectively connected together to provide the resistance value at the gate of the at least one pseudomorphic high electron mobility transistor.

9. The antenna switch module of claim 8 further comprising a controller connected to the gate resistance circuit and configured to provide at least one control signal to actuate switches associated with selected ones of the plurality of switchable resistors to connect together the selected ones of the plurality of switchable resistors to provide the resistance value at the gate of the at least one pseudomorphic high electron mobility transistor, the resistance value being selected such that the second harmonic signal substantially cancels the first harmonic signal at the load terminal.

10. The antenna switch module of claim 9 wherein a net harmonic signal at the load terminal resulting from cancellation of the first harmonic signal by the second harmonic signal has a power level of less than −

50 dBm.

11. The antenna switch module of claim 1 wherein the gate resistance circuit includes at least one non-linear resistor.

12. The antenna switch module of claim 1 further comprising:

a frequency detector configured to monitor a power level of a net harmonic signal at the load terminal resulting from cancellation of the first harmonic signal by the second harmonic signal and to provide a feedback signal indicating the power level; and

a controller connected to the gate resistance circuit and to the frequency detector, the controller being configured to receive the feedback signal from the frequency detector and to adjust the resistance value based on the feedback signal.

5. An antenna switch module comprising:

an input signal terminal;

a load terminal;

a pseudomorphic high electron mobility transistor switching circuit connected in series between the input signal terminal and the load terminal, the pseudomorphic high electron mobility transistor switching circuit including at least one pseudomorphic high electron mobility transistor configured to produce a first harmonic signal at the load terminal responsive to being driven by an input signal of a fundamental frequency received at the input signal terminal, the first harmonic signal having a first phase; and

a gate resistance circuit connected to a gate of the at least one pseudomorphic high electron mobility transistor and having a resistance value selected to produce a second harmonic signal at the load terminal, the second harmonic signal having a second phase opposite to the first phase, the gate resistance circuit including at least one variable resistor.

6. The antenna switch module of claim 5 further comprising a controller connected to the gate resistance circuit and configured to tune a resistance of the at least one variable resistor to provide the resistance value at the gate of the at least one pseudomorphic high electron mobility transistor, the resistance value being selected such that the second harmonic signal substantially cancels the first harmonic signal at the load terminal.

7. The antenna switch module of claim 6 wherein a net harmonic signal at the load terminal resulting from cancellation of the first harmonic signal by the second harmonic signal has a power level of less than −

50 dBm.

13. A wireless device comprising:

an antenna;

a transmitter configured to generate a transmit signal of a fundamental frequency for transmission by the antenna; and

an antenna switch connected between the antenna and the transmitter, the antenna switch including a pseudomorphic high electron mobility transistor switching circuit connected in series between a signal terminal and the antenna, the pseudomorphic high electron mobility transistor switching circuit including at least one pseudomorphic high electron mobility transistor configured to produce a first harmonic signal at the antenna responsive to being driven by the transmit signal received at the signal terminal from the transmitter, the first harmonic signal having a first phase, and the antenna switch further including a gate resistance circuit connected to a gate of the at least one pseudomorphic high electron mobility transistor and having a resistance value selected to produce a second harmonic signal at the antenna, the second harmonic signal having a second phase opposite to the first phase, the gate resistance circuit including at least one variable resistor.

14. The wireless device of claim 13 further comprising:

a receiver configured to process a received signal received by the antenna; and

filter circuitry including a transmit filter connected between the transmitter and the antenna switch and a receive filter connected between the antenna switch and the receiver.

15. The wireless device of claim 14 further comprising a phase shifter connected between the antenna switch and the filter circuitry.

16. The wireless device of claim 14 further comprising:

a power amplifier connected between the transmitter and the transmit filter, the power amplifier being configured to receive and amplify the transmit signal; and

a low noise amplifier connected between the receive filter and the receiver and configured to receive and amplify the received signal.

17. The wireless device of claim 16 wherein the low noise amplifier includes at least one amplifying pseudomorphic high electron mobility transistor and at least one non-linear shunt resistor connected to the at least one amplifying pseudomorphic high electron mobility transistor.

18. A wireless device comprising:

an antenna;

a transmitter configured to generate a transmit signal of a fundamental frequency for transmission by the antenna;

an antenna switch connected between the antenna and the transmitter, the antenna switch including a pseudomorphic high electron mobility transistor switching circuit connected in series between a signal terminal and the antenna, the pseudomorphic high electron mobility transistor switching circuit including at least one pseudomorphic high electron mobility transistor configured to produce a first harmonic signal at the antenna responsive to being driven by the transmit signal received at the signal terminal from the transmitter, the first harmonic signal having a first phase, and the antenna switch further including a gate resistance circuit connected to a gate of the at least one pseudomorphic high electron mobility transistor and having a resistance value selected to produce a second harmonic signal at the antenna, the second harmonic signal having a second phase opposite to the first phase;

a frequency detector configured to monitor a power level of a net harmonic signal at the antenna resulting from cancellation of the first harmonic signal by the second harmonic signal and to provide a feedback signal indicating the power level; and

a controller connected to the gate resistance circuit and to the frequency detector, the controller being configured to receive the feedback signal from the frequency detector and to adjust the resistance value based on the feedback signal.

19. The wireless device of claim 18 wherein the gate resistance circuit includes at least one variable resistor, and wherein the controller is configured to tune a resistance of the at least one variable resistor to provide the resistance value at the gate of the at least one pseudomorphic high electron mobility transistor, the resistance value being selected such that the second harmonic signal substantially cancels the first harmonic signal at the load terminal.

20. The wireless device of claim 18 wherein the gate resistance circuit includes a plurality of switchable resistors configured to be selectively connected together to provide the resistance value at the gate of the at least one pseudomorphic high electron mobility transistor, and wherein the controller is configured to provide at least one control signal to actuate switches associated with selected ones of the plurality of switchable resistors to connect together the selected ones of the plurality of switchable resistors to provide the resistance value at the gate of the at least one pseudomorphic high electron mobility transistor, the resistance value being selected such that the second harmonic signal substantially cancels the first harmonic signal at the load terminal.