Optimized function assignment in a multi-core processor

• US 10,700,968 B2
• Filed: 10/19/2016
• Issued: 06/30/2020
• Est. Priority Date: 10/19/2016
• Status: Active Grant

• Current Assignee: REX Computing, Inc.
• Original Assignee: REX Computing, Inc.
• Inventors: Sebexen, Paul Michael, Sohmers, Thomas Rex
• Primary Examiner(s): Rutkowski, Jeffrey M
• Assistant Examiner(s): Tacdiran, Andre
• Application Number:
  US15/298,183
• Publication Number:
  US 20180109449A1
• Time in Patent Office: 1,350 Days
• Field of Search: None
• CPC Class Codes: G06F 15/17381 Two dimensional, e.g. mesh, torus
• CPC Class Codes: G06F 15/7867 with reconfigurable architecture
• CPC Class Codes: G06F 2119/12 Timing analysis or timing optimisation
• CPC Class Codes: H04L 41/0823 characterised by the purposes of a change of settings, e.g. optimising configuration for enhancing reliability for optimising operational conditions of wireless networks H04W24/02
• CPC Class Codes: H04L 41/145 involving simulating, designing, planning or modelling of a network
• CPC Class Codes: H04L 43/08 Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
• CPC Class Codes: H04L 45/70 Routing based on monitoring results
• CPC Class Codes: H04L 49/109 Integrated on microchip, e.g. switch-on-chip

Abstract

A system including an optimization module executing on and configured to enable a computer processor to: receive a user application including a set of functions and simulate execution of different configurations of the functions on a multi-core microprocessor chip, where: the multi-core microprocessor chip includes a set of tiles arranged in a grid configuration, where each tile includes a processor core and a corresponding router, where each router is communicatively coupled with at least one other router to form a network-on-chip and implements a deterministic static priority routing policy, and the different configurations include execution of the functions by different groups of tiles. The computer processor is further enabled to monitor network traffic patterns of the execution of the different configurations; rank the different configurations based on the corresponding network traffic patterns; and select an optimal configuration of the different configurations based on the ranking.

Claims

1. A system comprising:

a computer processor; and

an optimization module executing on the computer processor and configured to enable the computer processor to;

receive a user application, wherein the user application includes a set of functions;

simulate execution of different configurations of the set of functions on a multi-core microprocessor chip, wherein;

the multi-core microprocessor chip comprises a set of tiles arranged in a grid configuration, wherein each tile comprises a processor core and a corresponding router, wherein each router;

is communicatively coupled with at least one other router to form a network-on-chip, and

implements the same deterministic static priority routing policy, wherein the deterministic static priority routing policy comprises assigning unchanging priority levels to the input ports of the router and routing outbound data in accordance with the unchanging priority levels, and

the different configurations include execution of the set of functions by different groups of tiles;

monitor network traffic patterns of the execution of the different configurations;

rank the different configurations according to ranking criteria, wherein the ranking criteria is used to rank each of the different configurations based on the corresponding network traffic patterns; and

select an optimal configuration of the different configurations based on the ranking.

2. The system of claim 1, wherein the optimization module is further configured to enable the computer processor to receive an identification of a high priority function of the set of functions, wherein the ranking is based on optimal network traffic patterns for the high priority function.

3. The system of claim 1, wherein the optimization module is further configured to enable the computer processor to determine a high traffic function of the set of functions based on the monitoring, wherein the ranking is based on optimal network traffic patterns for the high traffic function.

4. The system of claim 1, wherein the optimization module is further configured to enable the computer processor to assign a function with high outbound network traffic to a group of tiles in an area of the grid having high routing priority.

5. The system of claim 1, wherein:

execution of a function includes execution of a set of sub-functions by a group of tiles; and

the optimization module is further configured to enable the computer processor to arrange the set of sub-functions with particular tiles of a group of tiles executing the function for optimal performance in accordance with the static priority routing policy.

6. The system of claim 1, wherein the optimization module is further configured to enable the computer processor to:

determine that a group of tiles executing a first function most frequently sends data packets to a group of tiles executing a second function; and

assign execution of the first function to a first group of tiles more proximate to a second group of tiles executing the second function than a majority of all other groups of tiles.

7. The system of claim 1, wherein the optimization module is further configured to enable the computer processor to:

determine that a group of tiles executing a first function most frequently sends data packets to a group of tiles executing a second function; and

assign execution of the first function to a first group of tiles in a high routing priority area of the grid with respect to a second group of tiles executing the second function.

8. The system of claim 1, wherein the ranking criteria comprises at least one selected from a group consisting of overall network traffic of the network-on-chip, network traffic for high priority functions, overall performance of the network-on-chip, performance for high priority functions, and overall power consumption of the network-on-chip.

9. The system of claim 1, wherein the user application comprises at least one selected from a group consisting of source code, assembly code, and machine code.

10. A method comprising:

receiving a user application, wherein the user application includes a set of functions;

simulating execution of different configurations of the set of functions on a multi-core microprocessor chip, wherein;

the multi-core microprocessor chip comprises a set of tiles arranged in a grid configuration, wherein each tile comprises a processor core and a corresponding router, wherein each router;

is communicatively coupled with at least one other router to form a network-on-chip, and

implements the same deterministic static priority routing policy, wherein the deterministic static priority routing policy comprises assigning unchanging priority levels to the input ports of the router and routing outbound data in accordance with the unchanging priority levels, and

the different configurations include execution of the set of functions by different groups of tiles;

monitoring network traffic patterns of the execution of the different configurations;

ranking the different configurations according to ranking criteria, wherein the ranking criteria is used to rank each of the different configurations based on the corresponding network traffic patterns; and

selecting an optimal configuration of the different configurations based on the ranking.

11. The method of claim 10:

further comprising receiving an identification of a high priority function of the set of functions; and

wherein the ranking is based on optimal network traffic patterns for the high priority function.

12. The method of claim 10:

further comprising determining a high traffic function of the set of functions based on the monitoring; and

wherein the ranking is based on optimal network traffic patterns for the high traffic function.

13. The method of claim 10, further comprising assigning a function with high outbound network traffic to a group of tiles in an area of the grid having high routing priority.

14. The method of claim 10:

wherein execution of a function includes execution of a set of sub-functions by a group of tiles; and

further comprising arranging the set of sub-functions with particular tiles of a group of tiles executing the function for optimal performance in accordance with the static priority routing policy.

15. The method of claim 10, further comprising:

determining that a group of tiles executing a first function most frequently sends data packets to a group of tiles executing a second function; and

assigning execution of the first function to a first group of tiles more proximate to a second group of tiles executing the second function than a majority of all other groups of tiles.

16. The method of claim 10, further comprising:

determining that a group of tiles executing a first function most frequently sends data packets to a group of tiles executing a second function; and

assigning execution of the first function to a first group of tiles in a high routing priority area of the grid with respect to a second group of tiles executing the second function.

17. The method of claim 10, wherein the ranking criteria comprises at least one selected from a group consisting of overall network traffic of the network-on-chip, network traffic for high priority functions, overall performance of the network-on-chip, performance for high priority functions, and overall power consumption of the network-on-chip.

18. The method of claim 10, wherein the user application comprises at least one selected from a group consisting of source code, assembly code, and machine code.

19. A method comprising:

receiving a user application, wherein the user application includes a set of functions to be executed by a multi-core microprocessor chip, wherein the multi-core microprocessor chip comprises a set of tiles each including a processor core and a corresponding router, wherein each router;

is communicatively coupled with at least one other router to form a network-on-chip grid, and

implements the same deterministic static priority routing policy, wherein the deterministic static priority routing policy comprises assigning unchanging priority levels to the input ports of the router and routing outbound data in accordance with the unchanging priority levels;

receiving an identification of a high priority function of the set of functions;

identifying one or more tiles with high routing priority according to the static priority routing policy;

assigning execution of the high priority function to the one or more tiles with high routing priority; and

executing the high priority function in accordance with the assignment.

20. The method of claim 19, wherein the high priority function is a high traffic function.