Thin film transistor, method of manufacturing thin film transistor, and display

• US 10,707,313 B2
• Filed: 09/10/2015
• Issued: 07/07/2020
• Est. Priority Date: 10/03/2014
• Status: Active Grant

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Amari, Koichi
• Primary Examiner(s): Zhu, Sheng-Bai
• Application Number:
  US15/512,163
• Publication Number:
  US 20170288029A1
• Time in Patent Office: 1,762 Days
• Field of Search: 257 59, 257 72, 438 34
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 29/41733 for thin film transistors with insulated gate
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H10K 10/466 Lateral bottom-gate IGFETs comprising only a single gate
• CPC Class Codes: H10K 19/10 comprising field-effect transistors

Abstract

A thin film transistor includes a gate electrode, an insulation film disposed on the gate electrode, a semiconductor layer facing the gate electrode with the insulation film in between, and a source-drain wiring layer electrically coupled to the semiconductor layer, and including a first wiring layer and a second wiring layer. The first wiring layer is in contact with the semiconductor layer between the semiconductor layer and the insulation film, and is configured of a transparent electroconductive film. The second wiring layer is overlapped with a portion of the first wiring layer. Another semiconductor layer made of a material same as a material of the semiconductor layer is stacked on the second wiring layer.

Claims

1. A thin film transistor, comprising:

a gate electrode;

an insulation film on the gate electrode;

a first semiconductor layer, wherein the insulation film is between the gate electrode and the first semiconductor layer;

a source-drain wiring layer electrically coupled to the first semiconductor layer, wherein

the source-drain wiring layer includes a first layer and a second layer,

the first layer of the source-drain wiring layer is between the first semiconductor layer and the insulation film,

the first layer of the source-drain wiring layer comprises a transparent electroconductive film,

a portion of the first layer of the source-drain wiring layer is covered by the first semiconductor layer, and

a remaining portion of the first layer other than the portion covered by the first semiconductor layer is covered by the second layer of the source-drain wiring layer, such that two surfaces of the first layer are in contact with the second layer of the source-drain wiring layer; and

a second semiconductor layer that comprises a first material, wherein

a first surface of the second layer of the source-drain wiring layer is in contact with the second semiconductor layer,

a second surface of the second layer of the source-drain wiring layer is in contact with the insulation film,

the first surface is opposite to the second surface,

the first material is same as a second material of the first semiconductor layer,

the second semiconductor layer is on the second layer of the source-drain wiring layer, and

the second layer of the source-drain wiring layer separates the first semiconductor layer and the second semiconductor layer.

2. The thin film transistor according to claim 1, wherein the first layer of the source-drain wiring layer is non-overlapped with a first end part of the gate electrode in a plan view.

3. The thin film transistor according to claim 2, wherein, in the plan view, a position of an end part of the first layer is same as a position of a second end part of the gate electrode.

4. The thin film transistor according to claim 1, wherein the second layer of the source-drain wiring layer comprises a metal.

5. The thin film transistor according to claim 1, wherein a thickness of the second layer of the source-drain wiring layer is larger than a thickness of the first semiconductor layer.

6. The thin film transistor according to claim 1, wherein the second layer of the source-drain wiring layer is non-overlapped with the first semiconductor layer.

7. The thin film transistor according to claim 1, wherein the first semiconductor layer comprises an oxide semiconductor.

8. The thin film transistor according to claim 1, wherein the first semiconductor layer comprises an organic semiconductor.

9. A display, comprising:

a thin film transistor that comprises;

a gate electrode;

an insulation film on the gate electrode;

a first semiconductor layer, wherein the insulation film is between the gate electrode and the first semiconductor layer;

a source-drain wiring layer electrically coupled to the first semiconductor layer, wherein

the source-drain wiring layer includes a first layer and a second layer,

the first layer of the source-drain wiring layer is between the first semiconductor layer and the insulation film,

the first layer of the source-drain wiring layer comprises a transparent electroconductive film,

a portion of the first layer of the source-drain wiring layer is covered by the first semiconductor layer, and

a remaining portion of the first layer other than the portion covered by the first semiconductor layer is covered by the second layer of the source-drain wiring layer, such that two surfaces of the first layer are in contact with the second layer of the source-drain wiring layer; and

a second semiconductor layer that comprises a first material, wherein

a first surface of the second layer of the source-drain wiring layer is in contact with the second semiconductor layer,

a second surface of the second layer of the source-drain wiring layer is in contact with the insulation film,

the first surface is opposite to the second surface,

the first material is same as a second material of the first semiconductor layer,

the second semiconductor layer is on the second layer of the source-drain wiring layer, and

the second layer of the source-drain wiring layer separates the first semiconductor layer and the second semiconductor layer.