Apparatus and system for digitally controlled oscillator

• US 10,707,878 B2
• Filed: 08/20/2015
• Issued: 07/07/2020
• Est. Priority Date: 03/22/2012
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Lotfy, Amr M., Abdelsalam, Mohamed A., El Mahalawy, Mohammed W., Kurd, Nasser A., Abdelmoneum, Mohamed A.
• Primary Examiner(s): Shin, Jeffrey M
• Application Number:
  US14/831,694
• Publication Number:
  US 20160006443A1
• Time in Patent Office: 1,783 Days
• Field of Search: 331 1 A, 331 34, 331 57, 331185, 331186
• CPC Class Codes: H03K 3/0315 Ring oscillators
• CPC Class Codes: H03L 7/00 Automatic control of frequency or phase; Synchronisation
• CPC Class Codes: H03L 7/0818 the controlled phase shifter comprising coarse and fine delay or phase-shifting means
• CPC Class Codes: H03L 7/087 using at least two phase detectors or a frequency and phase detector in the loop
• CPC Class Codes: H03L 7/0992 comprising a counter or a frequency divider

Abstract

Described herein is apparatus and system for a digitally controlled oscillator (DCO). The apparatus comprises a voltage regulator to provide an adjustable power supply; and a DCO to generate an output clock signal, the DCO including one or more delay elements, each delay element operable to change its propagation delay via the adjustable power supply, wherein each delay element comprising an inverter with adjustable drive strength, wherein the inverter is powered by the adjustable power supply. The apparatus further comprises a digital controller to generate a first signal for instructing the voltage regulator to adjust a voltage level of the adjustable power supply.

Claims

1. An apparatus comprising:

a digitally controlled oscillator (DCO);

a supply node to provide a regulated power supply to the DCO through a variable resistor; and

a digital loop filter (DLF) coupled to the DCO to generate a digital code according to a phase error, wherein the digital code is to adjust resistance of the variable resistor to modify the regulated power supply.

2. The apparatus of claim 1 comprises a circuit to receive the digital code and to generate a control signal according to the digital code.

3. The apparatus of claim 1 comprises a phase detector to detect the phase error between a reference signal and a feedback signal.

4. The apparatus of claim 3, wherein the phase detector is to provide the phase error indicating a phase lead condition or a phase lag condition.

5. The apparatus of claim 3 comprises a divider to receive an output of the DCO and to provide the feedback signal.

6. The apparatus of claim 1, wherein the DCO comprises an odd number of delay cells.

7. The apparatus of claim 6, wherein at least one of the delay cells is an inverter.

8. The apparatus of claim 1, wherein the DCO comprises an even number of delay cells.

9. The apparatus of claim 8, wherein at least one of the delay cells is an inverter.

10. The apparatus of claim 1, wherein the DCO comprises delay cells coupled together in a cyclic manner.

11. The apparatus of claim 1, wherein at least one circuit coupled to the DCO receives a power supply separate from the regulated power supply.

12. An apparatus comprising:

a digitally controlled oscillator (DCO);

a supply node to provide a regulated power supply to the DCO through a variable resistor; and

a digital loop filter (DLF) coupled to the DCO to generate a digital code according to a phase error, wherein the variable resistor has a resistance which is adjustable according to the digital code to modify the regulated power supply.

13. The apparatus of claim 12 comprises a circuit to receive the digital code and to generate a control signal according to the digital code.

14. The apparatus of claim 12, wherein at least one circuit coupled to the DCO receives a power supply separate from the regulated power supply.

15. A system comprising:

a memory;

a processor coupled to the memory, the processor comprising;

a digitally controlled oscillator (DCO);

a supply node to provide a regulated power supply to the DCO through a variable resistor; and

a digital loop filter (DLF) coupled to the DCO to generate a digital code according to a phase error, wherein the digital code is to adjust resistance of the variable resistor to modify the regulated power supply; and

a wireless interface to allow the processor to couple to another device.

16. The system of claim 15, wherein processor comprises a circuit to receive the digital code and to generate a control signal according to the digital code.

17. A method comprising:

providing a regulated power supply to a digitally controlled oscillator (DCO) through a variable resistor; and

generating a digital code according to a phase error, wherein the variable resistor has a resistance which is adjustable according to the digital code to modify the regulated power supply.

18. The method of claim 17 comprises:

receiving the digital code and generating a control signal according to the digital code.

19. The method of claim 17 detecting the phase error between a reference signal and a feedback signal.