Systems and methods for performing electrophysiology (EP) signal processing

• US 10,708,191 B2
• Filed: 09/26/2019
• Issued: 07/07/2020
• Est. Priority Date: 05/09/2018
• Status: Active Grant

• Current Assignee: BioSig Technologies, Inc., Mayo Foundation For Medical Education And Research (Mayo Clinic)
• Original Assignee: BioSig Technologies, Inc.
• Inventors: Drakulic, Budimir S., Fakhar, Sina, Foxall, Thomas G., Vlajinic, Branislav, Asirvatham, Samuel J.
• Primary Examiner(s): Layno, Carl H
• Assistant Examiner(s): Ghand, Jennifer L
• Application Number:
  US16/584,167
• Publication Number:
  US 20200022591A1
• Time in Patent Office: 285 Days
• CPC Class Codes: A61B 18/1492 having a flexible, catheter-like structure, e.g. for heart ablation A61B18/1477 takes precedence
• CPC Class Codes: A61B 2018/00351 Heart
• CPC Class Codes: A61B 2018/00577 Ablation
• CPC Class Codes: A61B 2562/18 Shielding or protection of sensors from environmental influences, e.g. protection from mechanical damage
• CPC Class Codes: A61B 2562/223 Optical cables therefor
• CPC Class Codes: A61B 5/0006 ECG or EEG signals
• CPC Class Codes: A61B 5/0215 by means inserted into the body catheters A61M25/00
• CPC Class Codes: A61B 5/02405 Determining heart rate variability
• CPC Class Codes: A61B 5/0245 by using sensing means generating electric signals, i.e. ECG signals
• CPC Class Codes: A61B 5/0538 invasively, e.g. using a catheter
• CPC Class Codes: A61B 5/30 Input circuits therefor
• CPC Class Codes: A61B 5/308 for electrocardiography [ECG]
• CPC Class Codes: A61B 5/316 Modalities, i.e. specific diagnostic methods
• CPC Class Codes: A61B 5/318 Heart-related electrical modalities, e.g. electrocardiography [ECG]
• CPC Class Codes: A61B 5/352 Detecting R peaks, e.g. for synchronising diagnostic apparatus; Estimating R-R interval
• CPC Class Codes: A61B 5/361 Detecting fibrillation
• CPC Class Codes: A61B 5/363 Detecting tachycardia or bradycardia
• CPC Class Codes: A61B 5/366 Detecting abnormal QRS complex, e.g. widening
• CPC Class Codes: A61B 5/4836 Diagnosis combined with treatment in closed-loop systems or methods A61B5/0036 takes precedence
• CPC Class Codes: A61B 5/7203 for noise prevention, reduction or removal
• CPC Class Codes: A61B 5/7217 : of noise originating from a therapeutic or surgical apparatus, e.g. from a pacemaker
• CPC Class Codes: A61B 5/7221 : Determining signal validity, reliability or quality A61B5/7207 and A61B5/7217 take precedence
• CPC Class Codes: A61B 5/7225 : Details of analog processing, e.g. isolation amplifier, gain or sensitivity adjustment, filtering, baseline or drift compensation A61B5/30, A61B5/316 take precedence; transformers for specific applications H01F38/00; amplifiers H03F
• CPC Class Codes: A61B 5/7246 : using correlation, e.g. template matching or determination of similarity
• CPC Class Codes: A61B 5/742 : using visual displays A61B5/339 takes precedence
• CPC Class Codes: A61B 5/7435 : Displaying user selection data, e.g. icons in a graphical user interface
• CPC Class Codes: G16H 40/63 : for local operation
• CPC Class Codes: H01L 2924/14335 : Digital signal processor [DSP]
• CPC Class Codes: H02H 9/04 : responsive to excess voltage lightning arrestors H01C7/12, H01C8/04, H01G9/18, H01T
• CPC Class Codes: H02H 9/045 : adapted to a particular application and not provided for elsewhere
• CPC Class Codes: H03F 2200/129 : there being a feedback over the complete amplifier
• CPC Class Codes: H03F 2200/171 : A filter circuit coupled to the output of an amplifier
• CPC Class Codes: H03F 2200/234 : the input amplifying stage being one or more operational amplifiers
• CPC Class Codes: H03F 2200/375 : Circuitry to compensate the offset being present in an amplifier
• CPC Class Codes: H03F 2200/451 : the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2203/45116 : Feedback coupled to the input of the differential amplifier
• CPC Class Codes: H03F 2203/45528 : the FBC comprising one or more passive resistors and being coupled between the LC and the IC
• CPC Class Codes: H03F 2203/45601 : the IC comprising one or more passive resistors by feedback
• CPC Class Codes: H03F 3/45 : Differential amplifiers differential sense amplifiers G11C7/062
• CPC Class Codes: H03F 3/45475 : using IC blocks as the active amplifying circuit
• CPC Class Codes: H03F 3/68 : Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics power amplifiers using a combination of several semiconductor amplifiers H03F3/211; combinations of amplifiers using coupling networks with distributed constants H03F3/602
• CPC Class Codes: H03H 2017/0298 : DSP implementation
• CPC Class Codes: H03K 5/125 : Discriminating pulses measuring characteristics of individual pulses G01R29/02; separation of synchronising signals in television systems H04N5/08
• CPC Class Codes: H04B 1/0014 : using DSP [Digital Signal Processor] quadrature modulation and demodulation
• CPC Class Codes: H04B 1/0039 : using DSP [Digital Signal Processor] quadrature modulation and demodulation
• CPC Class Codes: H04L 43/02 : Capturing of monitoring data
• CPC Class Codes: H04L 47/50 : Queue scheduling

Abstract

Systems, methods, and computer program product embodiments are disclosed for performing electrophysiology (EP) signal processing. An embodiment includes an electrocardiogram (ECG) circuit board configured to process an ECG signal. The embodiment further includes a plurality of intracardiac (IC) circuit boards, each configured to process a corresponding IC signal. The embodiment further includes a communications interface communicatively coupled to a remote device, and a processor, coupled to the ECG circuit board, the plurality of IC circuit boards, and the communications interface. The processor is configured to receive, via the communications interface, feedback from the remote device. The processor is further configured to control, via the communication interface, the remote device based on the ECG signal, the IC signals, or the feedback from the remote device.

Claims

1. A system for performing electrophysiology (EP) signal processing, comprising:

an electrocardiogram (ECG) circuit board configured to receive an ECG signal, wherein the ECG circuit board comprises a large-signal detection circuit and a differential signal amplification stage, wherein the differential signal amplification stage is configured to amplify the ECG signal to output an output ECG signal and the large-signal detection circuit is coupled to the differential signal amplification stage and configured to remove signal saturation from the output ECG signal based on a time constant, wherein the time constant specifies a length of time that the output ECG signal is at maximum amplitude;

a plurality of intracardiac (IC) circuit boards, each configured to receive a corresponding IC signal;

a communications interface coupled to a remote device; and

a processor, coupled to the ECG circuit board, the plurality of IC circuit boards, and the communications interface, configured to;

receive, via the communications interface, feedback from the remote device; and

control, via the communication interface, the remote device based on the ECG signal, the IC signals, or the feedback from the remote device.

2. The system of claim 1, wherein the remote device is selected from the group consisting of an ultrasound machine, a radio frequency (RF) generator, a stimulator, a three-dimensional imaging device, an intra-cardiac echocardiography (ICE) machine, a fluoroscopy machine, and a defibrillator.

3. The system of claim 1, wherein the communications interface is coupled to the remote device using a communication protocol selected from the group consisting of Digital Imaging and Communications in Medicine (DICOM), Ethernet, Universal Serial Bus (USB), and Institute of Electrical and Electronics Engineers (IEEE) 802.11.

4. The system of claim 1, wherein the ECG circuit board further comprises a radio frequency filter circuit configured to attenuate an amplitude of the ECG signal between about 300 kHz and about 600 kHz.

5. The system of claim 4, wherein the ECG circuit board further comprises a low-frequency feedback circuit coupled to the radio frequency filter circuit, wherein the low-frequency feedback circuit is configured to drive a voltage of a reference node of the radio frequency filter circuit to increase input impedance of signal frequencies of the ECG signal such that the radio frequency filter circuit is configured as an open circuit at the signal frequencies of the ECG signal.

6. The system of claim 1, wherein the ECG circuit board comprises an input protection circuit configured to shunt a voltage of the ECG signal greater than or equal to 300 V.

7. The system of claim 6, wherein the ECG circuit board comprises a radio frequency filter circuit configured to attenuate an amplitude of the ECG signal between about 300 kHz and about 600 kHz.

8. The system of claim 7, wherein the ECG circuit board further comprises a low-frequency feedback circuit coupled to the radio frequency filter circuit, wherein the low-frequency feedback circuit is configured to drive a voltage of a reference node of the radio frequency filter circuit to increase input impedance of signal frequencies of the ECG signal such that the radio frequency filter circuit is configured as an open circuit at the signal frequencies of the ECG signal.

9. The system of claim 7, wherein the ECG circuit board further comprises a buffer.

10. The system of claim 9, wherein the differential signal amplification stage comprises an instrumentation amplifier, a first differential amplifier, and a second differential amplifier, wherein an output of the instrumentation amplifier has a differential gain of about 20, an output of the first differential amplifier has a differential gain of about 1, and an output of the second differential amplifier has a differential gain of about 0.5.

11. The system of claim 10, wherein the ECG circuit board further comprises an analog-to-digital (A/D) converter coupled to an output of the differential signal amplification stage, wherein the A/D converter is configured to convert the ECG signal to a digital format.

12. The system of claim 1, wherein the ECG circuit board comprises differential circuitry configured to generate a differential version of the ECG signal.

13. A computer implemented method, comprising:

receiving, by an electrocardiogram (ECG) circuit board, an ECG signal, wherein the ECG circuit board comprises a large-signal detection circuit coupled to a differential signal amplification stage;

amplifying, by the differential signal amplification stage, the ECG signal to output an output ECG signal;

removing, by the large-signal detection circuit, signal saturation from the output ECG signal based on a time constant, wherein the time constant specifies a length of time that the output ECG signal is at maximum amplitude;

receiving, by a plurality of intracardiac (IC) circuit boards, corresponding IC signals;

receiving, at a processor via a communications interface coupled to a remote device, feedback from a remote device; and

controlling, by the processor via the communication interface, the remote device based on the ECG signal, the IC signals, or the feedback from the remote device.

14. The method of claim 13, wherein the receiving the feedback from the remote device comprises receiving the feedback from a device that is selected from the group consisting of an ultrasound machine, a radio frequency (RF) generator, a stimulator, a three-dimensional imaging device, an intra-cardiac echocardiography (ICE) machine, a fluoroscopy machine, and a defibrillator.

15. The method of claim 13, wherein the communications interface is coupled to the remote device using a communication protocol selected from the group consisting of Digital Imaging and Communications in Medicine (DICOM), Ethernet, Universal Serial Bus (USB), and Institute of Electrical and Electronics Engineers (IEEE) 802.11.

16. The method of claim 13, further comprising:

attenuating, by a radio frequency filter circuit of the ECG circuit board, an amplitude of the ECG signal between about 300 kHz and about 600 kHz.

17. The method of claim 16, further comprising:

driving, by a low-frequency feedback circuit coupled to the radio frequency filter circuit of the ECG circuit board, a voltage of a reference node of the radio frequency filter circuit to increase input impedance of signal frequencies of the ECG signal such that the radio frequency filter circuit is configured as an open circuit at the signal frequencies of the ECG signal al.

18. The method of claim 13, further comprising:

shunting, by an input protection circuit of the ECG circuit board, a voltage of the ECG signal greater than or equal to 300 V.

19. The method of claim 18 further comprising:

attenuating, by a radio frequency filter circuit of the ECG circuit board, an amplitude of the ECG signal between about 300 kHz and about 600 kHz.

20. The method of claim 19, further comprising:

driving, by a low-frequency feedback circuit coupled to the radio frequency filter circuit of the ECG circuit board, a voltage of a reference node of the radio frequency filter circuit to increase input impedance of signal frequencies of the ECG signal such that the radio frequency filter circuit is configured as an open circuit at the signal frequencies of the ECG signal.

21. The method of claim 19, wherein:

the ECG circuit board further comprises a buffer; and

the differential signal amplification stage comprises an instrumentation amplifier, a first differential amplifier, and a second differential amplifier; and

wherein amplifying the ECG signal to output the output ECG signal further comprises;

amplifying, by the instrumentation amplifier, the ECG signal by a differential gain of about 20 to output a first ECG signal;

amplifying, by the first differential amplifier, the first ECG signal by a differential gain of about 1 to output a second ECG signal; and

amplifying, by the second differential amplifier, the second ECG signal by a differential gain of about 0.5 to output the output ECG signal.

22. The method of claim 21, wherein the ECG circuit board further comprises an analog-to-digital (A/D) converter coupled to an output of the differential-signal amplification stage, and further comprising:

converting, by the A/D converter, the output ECG signal to a digital format.

23. The method of claim 13, wherein the ECG circuit board further comprises differential circuitry, and further comprising:

generating, by the differential circuitry, a differential version of the ECG signal.