Differential charge transfer based accelerometer

• US 10,712,360 B2
• Filed: 09/26/2018
• Issued: 07/14/2020
• Est. Priority Date: 09/27/2017
• Status: Active Grant

• Current Assignee: Azoteq Pty Ltd.
• Original Assignee: Azoteq Pty Ltd.
• Inventors: Van Der Merwe, Douw Gerbrandt
• Primary Examiner(s): Hopkins, Brandi N
• Application Number:
  US16/142,349
• Publication Number:
  US 20190094261A1
• Time in Patent Office: 657 Days
• CPC Class Codes: G01P 15/125 by capacitive pick-up
• CPC Class Codes: G01P 15/18 in two or more dimensions
• CPC Class Codes: G01P 21/00 Testing or calibrating of apparatus or devices covered by the preceding groups
• CPC Class Codes: G01R 27/2605 Measuring capacitance capacitive sensors G01D5/24

Abstract

An integrated circuit measures a differential change between first and second mutual capacitances having receiver electrodes joined to form a common electrode of an MEMS circuit. The integrated circuit performs charge transfer measurements to transfer charge to a reference capacitor and a variable capacitor is used to change the amount of charge stored in the reference capacitor. First and second charge transfer measurements are performed, each having a number of charge transfer cycles used to transfer charge from the common electrode to the reference capacitor. In the first measurement, a transmit electrode of the first capacitance is driven high first, and in the second measurement, a transmit electrode of the second capacitance is driven high first. The circuit compensates for parasitic capacitances in the MEMS circuit with a sample-and-hold circuit selectively connected to the common electrode to maintain its voltage during a charge phase of a charge transfer cycle.

Claims

1. A method for measuring a differential change between first and second mutual capacitances of a MEMS circuit, wherein receiver electrodes of said first and second mutual capacitances are joined to form a common electrode, wherein charge transfer measurements are used to transfer charge to a reference capacitor and a plurality of current mirror structures are used to scale and control the amount of charge being transferred to said reference capacitor, and wherein a digitally controlled variable capacitor is used to change the amount of charge stored in said reference capacitor;

with said method comprising the steps of;

performing first and second charge transfer measurements, each comprising a number of charge transfer cycles used to transfer charge from said common electrode to the reference capacitor, said first measurement characterised by driving a transmit electrode of said first capacitance high first, said second measurement characterised by driving a transmit electrode of said second capacitance high first;

compensating for parasitic capacitances in said MEMS circuit through the use of a sample-and-hold circuit selectively connected to said common electrode to maintain its voltage during a charge phase of a charge transfer cycle.

2. The method of claim 1, wherein said variable capacitor and mirror structures are used to compensate for an offset in the measured differential capacitance change signal.

3. The method of claim 1, wherein said MEMS circuit forms part of an integrated accelerometer.

4. The method of claim 3, wherein said integrated accelerometer comprises circuitry for said charge transfer measurements, also comprising at least one of said current mirror structures, said variable capacitor, said reference capacitor and said sample-and-hold circuit.

5. The method of claim 1, wherein said first and second charge transfer measurements respectively provides first and second charge transfer count values, and wherein any one of the following is used to determine said differential capacitance change;

the first charge transfer count value;

the second charge transfer count value;

both the first and the second charge transfer count values.

6. The method of claim 5, wherein said first and second measurements are further characterised by repetitively driving the transmitter electrodes of the first and second capacitances out of phase from each other with either a supply voltage or with a ground potential;

wherein said common terminal is connected to a remainder of said charge transfer measurement circuit for the transfer of a difference between charge stored within said first and second capacitances to the reference capacitor.

7. The method of claim 1, wherein driving circuitry connected to said transmit electrodes of the first and second mutual capacitances is selected to compensate for parasitic capacitances between said transmit electrodes and ground.

8. The method of claim 7, wherein said selection entails the correct sizing of transistors used to drive said transmit electrodes.

9. The method of claim 1, wherein three pairs of said first and second mutual capacitances are used to sequentially measure acceleration along three orthogonal axes.

10. The method of claim 1, wherein three pairs of said first and second mutual capacitances are used to concurrently measure acceleration along three orthogonal axes.

11. An integrated circuit for measuring a differential change between first and second mutual capacitances of a MEMS circuit, wherein receiver electrodes of said first and second mutual capacitances are joined to form a common electrode, said integrated circuit performing charge transfer measurements to transfer charge to a reference capacitor, with a plurality of current mirror structures used to scale and control the amount of charge being transferred to said reference capacitor, wherein a digitally controlled variable capacitor is used to change the amount of charge stored in said reference capacitor, with said integrated circuit performing first and second charge transfer measurements, each comprising a number of charge transfer cycles used to transfer charge from the common electrode to the reference capacitor, said first measurement characterised by driving a transmit electrode of said first capacitance high first, said second measurement characterised by driving a transmit electrode of said second capacitance high first;

and wherein the integrated circuit compensates for parasitic capacitances in said MEMS circuit through the use of a sample-and-hold circuit selectively connected to said common electrode to maintain its voltage during a charge phase of a charge transfer cycle.

12. The integrated circuit of claim 11 wherein said variable capacitor and mirror structures are used to compensate for an offset in the measured differential capacitance change signal.

13. The integrated circuit of claim 11, wherein said MEMS circuit forms part of the integrated circuit used as an integrated accelerometer.

14. The integrated circuit of claim 13, wherein said integrated accelerometer comprises circuitry for said charge transfer measurement, also comprising at least one of said current mirror structures, said reference capacitor and said sample-and-hold circuit.

15. The integrated circuit of claim 11, wherein said first and second charge transfer measurements respectively provides first and second charge transfer count values, and wherein any one of the following is used to determine said differential capacitance change;

the first charge transfer count value;

the second charge transfer count value;

both the first and the second charge transfer count values.

16. The integrated circuit of claim 15, wherein said first and second measurements are further characterised by repetitively driving the transmitter electrodes of the first and second capacitances out of phase from each other with either a supply voltage or with a ground potential;

wherein said common terminal is connected to the remainder of said charge transfer measurement circuit for the transfer of a difference between charge stored within said first and second capacitances to the reference capacitor.

17. The integrated circuit of claim 11, wherein driving circuitry connected to said transmit electrodes of the first and second mutual capacitances is selected to compensate for parasitic capacitances between said transmit electrodes and ground.

18. The integrated circuit of claim 17, wherein said selection entails the correct sizing of transistors used to drive said transmit electrodes.

19. The integrated circuit of claim 11, wherein said reference capacitor is replaced by a circuit which measures current out of one of said plurality of current mirror structures, and wherein said current measurement is integrated over time to determine the amount of charge transferred.

20. The integrated circuit of claim 11, wherein said first and second mutual capacitances are used to measure acceleration along a first axis, and wherein two additional pairs of mutual capacitances form part of said MEMS circuit and are used to measure acceleration along two additional axes, wherein said additional axes are orthogonal to each other and to said first axis, and wherein circuitry within said integrated circuit performs said acceleration measurements according to one of:

i. a sequential manner;

ii. a concurrent manner.