Shape metric based scoring of wafer locations

• US 10,714,366 B2
• Filed: 04/04/2019
• Issued: 07/14/2020
• Est. Priority Date: 04/12/2018
• Status: Active Grant

• Current Assignee: KLA-Tencor Corporation
• Original Assignee: KLA-Tencor Corporation
• Inventors: Banerjee, Saibal, Saraswatula, Jagdish Chandra
• Primary Examiner(s): Asfaw, Mesfin T
• Application Number:
  US16/375,851
• Publication Number:
  US 20190318949A1
• Time in Patent Office: 467 Days
• CPC Class Codes: G01N 21/9501 Semiconductor wafers manufacturing processes per se of semiconductor devices implementing a measuring step H01L22/10
• CPC Class Codes: G01N 21/95607 using a comparative method
• CPC Class Codes: G03F 7/70625 Dimensions, e.g. line width, critical dimension [CD], profile, sidewall angle or edge roughness
• CPC Class Codes: G06F 30/398 Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] optical proximity correction [OPC] design processes G03F1/36
• CPC Class Codes: H01J 2237/24592 Inspection and quality control of devices
• CPC Class Codes: H01J 37/226 Optical arrangements for illuminating the object; optical arrangements for collecting light from the object
• CPC Class Codes: H01L 21/67271 Sorting devices
• CPC Class Codes: H01L 21/67288 Monitoring of warpage, curvature, damage, defects or the like

Abstract

Methods and systems for shape metric based scoring of wafer locations are provided. One method includes selecting shape based grouping (SBG) rules for at least two locations on a wafer. For one of the wafer locations, the selecting step includes modifying distances between geometric primitives in a design for the wafer with metrology data for the one location and determining metrical complexity (MC) scores for SBG rules associated with the geometric primitives in a field of view centered on the one location based on the distances. The selecting step also includes selecting one of the SBG rules for the one location based on the MC scores. The method also includes sorting the at least two locations on the wafer based on the SBG rule selected for the at least two locations.

Claims

1. A system configured for shape metric based sorting of wafer locations, comprising:

one or more computer subsystems configured for;

selecting shape based grouping rules for at least two locations on a wafer, wherein for one of the locations on the wafer, selecting the shape based grouping rule comprises;

determining distances between geometric primitives in a field of view centered on the one location by modifying distances between the geometric primitives in a design for the wafer with metrology data for the one location on the wafer;

determining metrical complexity scores for shape based grouping rules associated with the geometric primitives in the field of view based on the determined distances between the geometric primitives; and

selecting one of the shape based grouping rules for the one location based on the metrical complexity scores; and

sorting the at least two locations on the wafer based on the shape based grouping rules selected for the at least two locations.

2. The system of claim 1, wherein said selecting one of the shape based grouping rules comprises identifying one of the shape based grouping rules having a maximum of the metrology complexity scores as a most possible shape based grouping rule for the one location and selecting the most possible shape based grouping rule for the one location.

3. The system of claim 1, wherein the at least two locations on the wafer comprise locations of defects detected on the wafer by inspection.

4. The system of claim 1, wherein the at least two locations on the wafer comprise locations of defects detected on the wafer by inspection, and wherein said sorting comprises sampling the defects detected at the at least two locations based on the shape based grouping rules selected for the at least two locations.

5. The system of claim 4, wherein the sampling is performed by inputting the shape based grouping rules selected for the at least two locations into a learning based model.

6. The system of claim 1, wherein the at least two locations on the wafer comprise locations of defects detected on the wafer by inspection, and wherein said sorting comprises prioritizing the defects for defect review based on the shape based grouping rules selected for the at least two locations.

7. The system of claim 1, wherein the at least two locations comprise shape based grouping rule hit locations.

8. The system of claim 7, wherein the one or more computer subsystems are further configured for identifying the shape based grouping rule hit locations by searching the design for the wafer for geometric primitives associated with one or more of the shape based grouping rules.

9. The system of claim 1, wherein said sorting comprises separating the at least two locations into groups such that the shape based grouping rule selected for each of the locations in one of the groups are the same.

10. The system of claim 1, wherein the one or more computer subsystems are further configured for generating care areas for the at least two locations based on the shape based grouping rules selected for the at least two locations.

11. The system of claim 1, wherein the one or more computer subsystems are further configured for prioritizing care areas for the at least two locations based on the shape based grouping rules selected for the at least two locations.

12. The system of claim 1, wherein the one or more computer subsystems are further configured for generating a context map for the wafer in which the shape based grouping rules selected for the at least two locations are associated with the at least two locations, and wherein the system further comprises an inspection tool configured to perform inspection of the wafer using one or more inspection parameters defined based on the context map.

13. The system of claim 1, wherein the one or more computer subsystems are further configured for acquiring the metrology data for the wafer from a metrology tool that performs measurements on the wafer at an array of measurement points on the wafer and assigning the metrology data to the at least two locations on the wafer based on positions of the at least two locations on the wafer determined with respect to locations of the measurement points on the wafer.

14. The system of claim 13, wherein a density of the measurement points on the wafer is less than a density of inspection points on the wafer at which output is generated by a detector of an inspection tool during inspection of the wafer.

15. The system of claim 13, wherein said assigning comprises:

for the at least two locations having the positions at the locations of the measurement points, assigning the acquired metrology data generated at the locations of the measurement points to the at least two locations based on which of the measurement points at which the at least two locations are positioned; and

for the at least two locations having the positions spaced from the locations of the measurement points, predicting the metrology data at the at least two locations from the metrology data generated at the measurement points and the positions of the at least two locations determined with respect to the locations of the measurement points.

16. The system of claim 15, wherein said predicting comprises interpolation of the acquired metrology data from the measurement points to the positions of the at least two locations determined with respect to the locations of the measurement points.

17. The system of claim 15, wherein said predicting comprises extrapolation of the acquired metrology data from the measurement points to the positions of the at least two locations determined with respect to the locations of the measurement points.

18. The system of claim 13, wherein the metrology tool generates the metrology data for the wafer prior to inspection of the wafer.

19. The system of claim 13, wherein the measurement points are determined prior to inspection of the wafer and independently of defects detected on the wafer.

20. The system of claim 13, wherein at least some values of the metrology data generated by the metrology tool are below a resolution limit of an inspection tool that performs inspection of the wafer.

21. The system of claim 13, wherein the metrology data comprises one or more of film thickness, patterned structure profile, critical dimension, line edge roughness, line width roughness, and overlay measurements.

22. The system of claim 13, wherein the metrology data comprises one or more of lithography focus metrology and scanner leveling data.

23. The system of claim 13, wherein the metrology data comprises measurements of a characteristic of the wafer known to correlate with patterning defects.

24. The system of claim 1, further comprising an output acquisition subsystem comprising at least an energy source and a detector, wherein the energy source is configured to generate energy that is directed to the wafer, wherein the detector is configured to detect energy from the wafer and to generate output responsive to the detected energy, and wherein the one or more computer subsystems are further configured to determine information for the at least two locations based on the output.

25. The system of claim 24, wherein the output acquisition subsystem is configured as an inspection subsystem.

26. The system of claim 24, wherein the output acquisition subsystem is configured as a metrology subsystem.

27. The system of claim 24, wherein the output acquisition subsystem is configured as a defect review subsystem.

28. The system of claim 24, wherein the energy directed to the wafer comprises light, and wherein the energy detected from the wafer comprises light.

29. The system of claim 24, wherein the energy directed to the wafer comprises electrons, and wherein the energy detected from the wafer comprises electrons.

30. A non-transitory computer-readable medium, storing program instructions executable on a computer system for performing a computer-implemented method for shape metric based sorting of wafer locations, wherein the computer-implemented method comprises:

selecting shape based grouping rules for at least two locations on a wafer, wherein for one of the locations on the wafer, selecting the shape based grouping rule comprises;

determining distances between geometric primitives in a field of view centered on the one location by modifying distances between the geometric primitives in a design for the wafer with metrology data for the one location on the wafer;

determining metrical complexity scores for shape based grouping rules associated with the geometric primitives in the field of view based on the determined distances between the geometric primitives; and

selecting one of the shape based grouping rules for the one location based on the metrical complexity scores; and

sorting the at least two locations on the wafer based on the shape based grouping rules selected for the at least two locations.

31. A computer-implemented method for shape metric based sorting of wafer locations, comprising:

selecting shape based grouping rules for at least two locations on a wafer, wherein for one of the locations on the wafer, selecting the shape based grouping rule comprises;

determining distances between geometric primitives in a field of view centered on the one location by modifying distances between the geometric primitives in a design for the wafer with etrology data for the one location on the wafer;

determining metrical complexity scores for shape based grouping rules associated with the geometric primitives in the field of view based on the determined distances between the geometric primitives; and

selecting one of the shape based grouping rules for the one location based on the metrical complexity scores; and

sorting the at least two locations on the wafer based on the shape based grouping rules selected for the at least two locations, wherein selecting the shape based grouping rules and the sorting steps are performed by one or more computer subsystems.