Source ballasting for p-channel trench MOSFET

• US 10,714,580 B2
• Filed: 02/07/2018
• Issued: 07/14/2020
• Est. Priority Date: 02/07/2018
• Status: Active Grant

• Current Assignee: Alpha & Omega Semiconductor, Ltd.
• Original Assignee: Alpha & Omega Semiconductor, Ltd.
• Inventors: Lui, Sik
• Primary Examiner(s): Sefer, Ahmed N
• Application Number:
  US15/891,300
• Publication Number:
  US 20190245051A1
• Time in Patent Office: 888 Days
• CPC Class Codes: H01L 21/265 producing ion implantation
• CPC Class Codes: H01L 27/0629 in combination with diodes, or resistors, or capacitors
• CPC Class Codes: H01L 27/0727 in combination with diodes, or capacitors or resistors
• CPC Class Codes: H01L 29/086 Impurity concentration or distribution
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/4236 within a trench, e.g. trench gate electrode, groove gate electrode
• CPC Class Codes: H01L 29/66492 with a pocket or a lightly doped drain selectively formed at the side of the gate
• CPC Class Codes: H01L 29/66666 Vertical transistors H01L29/66712, H01L29/66742 take precedence
• CPC Class Codes: H01L 29/66727 with a step of recessing the source electrode
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7803 structurally associated with at least one other device assemblies H01L25/00; integrated circuits H01L27/00
• CPC Class Codes: H01L 29/7804 the other device being a pn-junction diode
• CPC Class Codes: H01L 29/7827 Vertical transistors H01L29/7802, H01L29/78642 take precedence
• CPC Class Codes: H01L 29/7833 with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's for thin film transistors H01L29/78618

Abstract

A trench metal-oxide-semiconductor field-effect transistor (MOSFET) device, comprising a substrate of a first conductivity type, a body region of a second conductivity type, a gate electrode formed in a gate trench extending in the body region and substrate, a lightly doped source region and a heavily doped source region formed in the body region, and a trench contact extending to the body region formed in a contact trench. A contact implant of the second conductivity type is formed surrounding a bottom portion of the contact trench and it also forms surrounding sidewall portions of the contact trench where it contacts with the lightly doped source region to form a PN diode.

Claims

1. A trench metal-oxide-semiconductor field-effect transistor (MOSFET) device, comprising:

a) a substrate of a first conductivity type, the substrate comprising a semiconductor epitaxial layer of the first conductivity type provided on top of a heavily doped semiconductor wafer of the same conductivity type;

b) a body region of a second conductivity type that is opposite to the first conductivity type formed above the substrate;

c) a gate trench formed in the body region and substrate, wherein the gate trench is lined with a dielectric layer and a gate electrode is formed in the gate trench;

d) a lightly doped source region and a heavily doped source region formed in the body region, wherein the lightly doped source region extends deeper into the body region than the heavily doped source region; and

e) a trench contact formed in a contact trench extending into the body region, wherein a contact implant of the second conductivity type is formed surrounding a bottom portion of the contact trench and sidewall portions of the contact trench where it contacts the lightly doped source region, wherein the contact implant at the sidewall portions of the contact trench separates the lightly doped source region from directly contacting a source metal.

2. The device of claim 1, wherein the first conductivity type is a p-type conductivity type and the second conductivity type is an n-type conductivity type.

3. The device of claim 1, wherein a ballast resistor is formed at the lightly doped source region between the heavily doped source region and the body region.

4. The device of claim 1, wherein a PN diode is formed at a contact between the contact implant and the lightly doped source region.

5. The device of claim 1, wherein the contact trench is provided between two adjacent gate trenches.

6. The device of claim 5, wherein the trench contact provides a sidewall trench contact to the body region as well as the heavily doped source region in a plane of a depth direction of the gate trench.

7. The device of claim 5, wherein the contact trench has a width ranging from 0.2 μ

m to 1.5 μ

m.

8. The device of claim 7, further comprising a surface contact formed in a surface contact above the heavily doped source region.

9. The device of claim 8, wherein the trench contact provides a sidewall trench contact and a surface contact to the body region in the plane of a channel width direction and the surface contact provides a source surface contact to the heavily doped source region in the plane of a depth direction of the gate trench.

10. The device of claim 8, wherein the contact trench has a width ranging from 0.5 μ

m to 5.0 μ

m and wherein the surface contact trench has a width ranging from 0.2 μ

m to 1.5 μ

m.

11. The device of claim 1, wherein the trench contact is shorter than the gate electrode.

12. The device of claim 1, wherein the contact trench runs perpendicular to a surface source contact trench.

13. The device of claim 1, wherein the contact trench extends to the body region in a plane of a channel width direction that is orthogonal to a plane of a depth direction of the gate trench.

14. A method for manufacturing a trench MOSFET device, comprising:

a) forming a body region in a substrate, wherein the substrate comprises an epitaxial semiconductor layer of a first conductivity type on top of a heavily doped semiconductor wafer of the same conductivity type, wherein the body region is of a second conductivity type that is opposite to the first conductivity type;

b) forming a gate electrode in a gate trench, wherein the gate trench is formed in the body region and the substrate and lined with a dielectric layer;

c) forming a lightly doped source region and a heavily doped source region in the body region, wherein the lightly doped source region extends deeper into the body region than the heavily doped source region;

d) forming a trench contact in a contact trench extending to the body region and forming a contact implant of the second conductivity type surrounding a bottom portion of the contact trench and sidewall portions of the contact trench where it contacts the lightly doped source region, wherein the contact implant at the sidewall portions of the contact trench separates the lightly doped source region from directly contacting a source metal.

15. The method of claim 14, wherein the first conductivity type is a p-type conductivity type and the second conductivity type is an n-type conductivity type.

16. The method of claim 14, wherein a PN diode is formed at a contact between the contact implant and the lightly doped source region.

17. The method of claim 14, wherein the contact trench is formed extending to the body region between two adjacent gate trenches and wherein the trench contact provides a sidewall trench contact to the body region as well as the heavily doped source region.

18. The method of claim 14, wherein the contact trench extends to the body region in a plane of a channel width direction that is orthogonal to a plane of a depth direction of the gate trench.

20. The method of claim 14, A method for manufacturing a trench MOSFET device, comprising:

a) forming a body region in a substrate, wherein the substrate comprises an epitaxial semiconductor layer of a first conductivity type on top of a heavily doped semiconductor wafer of the same conductivity type, wherein the body region is of a second conductivity type that is opposite to the first conductivity type;

b) forming a gate electrode in a gate trench, wherein the gate trench is formed in the body region and the substrate and lined with a dielectric layer;

c) forming a lightly doped source region and a heavily doped source region in the body region, wherein the lightly doped source region extends deeper into the body region than the heavily doped source region;

d) forming a trench contact in a contact trench extending to the body region and forming a contact implant of the second conductivity type surrounding a bottom portion of the contact trench and sidewall portions of the contact trench where it contacts the lightly doped source region, wherein the contact implant is formed by using a large tilt angle 4 rotational implant.

19. A method for manufacturing a trench MOSFET device, comprising:

a) forming a body region in a substrate, wherein the substrate comprises an epitaxial semiconductor layer of a first conductivity type on top of a heavily doped semiconductor wafer of the same conductivity type, wherein the body region is of a second conductivity type that is opposite to the first conductivity type;

b) forming a gate electrode in a gate trench, wherein the gate trench is formed in the body region and the substrate and lined with a dielectric layer;

c) forming a lightly doped source region and a heavily doped source region in the body region, wherein the lightly doped source region extends deeper into the body region than the heavily doped source region;

d) forming a trench contact in a contact trench extending to the body region and forming a contact implant of the second conductivity type surrounding a bottom portion of the contact trench and sidewall portions of the contact trench where it contacts the lightly doped source region, wherein the lightly doped source region and the heavily doped source region is formed by a source implant comprising a combination of a deep source implant and a shallow source implant, wherein dopant ions for the deep source implant and the shallow source implant are of the same conductivity type to that of the substrate.

21. A method for manufacturing a trench MOSFET device, comprising:

a) forming a body region in a substrate, wherein the substrate comprises an epitaxial semiconductor layer of a first conductivity type on top of a heavily doped semiconductor wafer of the same conductivity type, wherein the body region is of a second conductivity type that is opposite to the first conductivity type;

b) forming a gate electrode in a gate trench, wherein the gate trench is formed in the body region and the substrate and lined with a dielectric layer;

c) forming a lightly doped source region and a heavily doped source region in the body region, wherein the lightly doped source region extends deeper into the body region than the heavily doped source region;

d) forming a trench contact in a contact trench extending to the body region and forming a contact implant of the second conductivity type surrounding a bottom portion of the contact trench and sidewall portions of the contact trench where it contacts the lightly doped source region; and

e) forming a surface contact in a surface contact trench above the heavily doped source region using a first mask and wherein the surface contact provides a source surface contact to the heavily doped source region.