Semiconductor device and manufacturing method thereof

• US 10,714,625 B2
• Filed: 09/08/2016
• Issued: 07/14/2020
• Est. Priority Date: 12/28/2010
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei
• Primary Examiner(s): Shamsuzzaman, Mohammed
• Assistant Examiner(s): Gray, Aaron J
• Application Number:
  US15/259,389
• Publication Number:
  US 20160380107A1
• Time in Patent Office: 1,405 Days
• Field of Search: 257 43, 257 49, 257E92296, 438104, 438158
• CPC Class Codes: H01L 27/1207 combined with devices in contact with the semiconductor body, i.e. bulk/SOI hybrid circuits
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1251 comprising TFTs having a different architecture, e.g. top- and bottom gate TFTs
• CPC Class Codes: H01L 29/41733 for thin film transistors with insulated gate
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous
• CPC Class Codes: H10B 12/00 Dynamic random access memory [DRAM] devices

Abstract

A semiconductor device capable of high speed operation is provided. Further, a highly reliable semiconductor device is provided. An oxide semiconductor having crystallinity is used for a semiconductor layer of a transistor. A channel formation region, a source region, and a drain region are formed in the semiconductor layer. The source region and the drain region are formed in such a manner that one or more of elements selected from rare gases and hydrogen are added to the semiconductor layer by an ion doping method or an ion implantation method with the use of a channel protective layer as a mask.

Claims

1. A semiconductor device comprising:

a first insulating film comprising oxygen;

an oxide semiconductor layer formed over and in contact with the first insulating film, the oxide semiconductor layer comprising indium and zinc, wherein the oxide semiconductor layer includes a channel formation region and a source region and a drain region with the channel formation region therebetween;

a gate insulating layer over the oxide semiconductor layer;

a gate electrode over the channel formation region with the gate insulating layer therebetween;

a second insulating film comprising silicon oxide over the gate electrode;

a third insulating film comprising aluminum oxide over the second insulating film; and

a source electrode and a drain electrode electrically connected to the source region and the drain region through contact holes provided in the second insulating film and the third insulating film, respectively,

wherein at least a portion of the oxide semiconductor layer comprises a crystalline region where a c-axis is aligned approximately in parallel with a normal vector of a surface of the portion of the oxide semiconductor layer and a portion of the oxide semiconductor layer is amorphous,

wherein an amount of oxygen released from the first insulating film is greater than or equal to 3.0×

10²⁰ atoms/cm³ in thermal desorption spectroscopy when the amount of oxygen is converted into oxygen atoms, and

wherein the source region and the drain region are selectively doped with at least one element selected from rare gases and hydrogen.

2. The semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises a non-single-crystal semiconductor.

3. The semiconductor device according to claim 1, wherein the source region and the drain region are formed by a self-aligned process using the gate electrode as a mask.

4. The semiconductor device according to claim 1, further comprising a transistor in which a channel formation region comprises single crystal silicon, wherein one of the source region and the drain region of the oxide semiconductor layer is electrically connected to a gate electrode of the transistor in which the channel formation region comprises single crystal silicon.

5. The semiconductor device according to claim 1, wherein the second insulating film contains hydrogen at a concentration of 0.1 at. % and lower than or equal to 25 at. %.

6. The semiconductor device according to claim 1, further comprising a second gate electrode below the oxide semiconductor layer, wherein the second gate electrode and the gate electrode are overlapped with each other,

wherein a length of the second gate electrode in a channel length direction of the oxide semiconductor layer is longer than a length of the gate electrode in the channel length direction of the oxide semiconductor layer.

7. A method for manufacturing a semiconductor device, comprising the steps of:

forming a first insulating film comprising oxygen, wherein an amount of oxygen released from the first insulating film is greater than or equal to 3.0×

10²⁰ atoms/cm³ in thermal desorption spectroscopy when the amount of oxygen is converted into oxygen atoms;

forming an oxide semiconductor layer over and in contact with the first insulating film, the oxide semiconductor layer comprising indium, zinc and gallium, wherein the oxide semiconductor layer includes a channel formation region and a source region and a drain region with the channel formation region therebetween;

forming a gate insulating layer over the oxide semiconductor layer;

forming a gate electrode over the oxide semiconductor layer with the gate insulating layer therebetween;

forming a second insulating film comprising silicon oxide over the gate electrode;

forming a third insulating film comprising aluminum oxide over the second insulating film;

forming contact holes in which part of the source region and part of the drain region are exposed, respectively; and

forming a source electrode and a drain electrode on the third insulating film, the source electrode and the drain electrode electrically connected to the part of the source region and the part of the drain region through the contact holes,

wherein the second insulating film is formed by CVD with a substrate temperature higher than or equal to 300°

C. and lower than or equal to 550°

C.,

wherein at least a portion of the oxide semiconductor layer comprises a crystalline region where a c-axis is aligned approximately in parallel with a normal vector of a surface of the portion of the oxide semiconductor layer and a portion of the oxide semiconductor layer is amorphous, and

wherein the source region and the drain region are selectively doped with at least one element selected from rare gases and hydrogen.

8. The method for manufacturing a semiconductor device, according to claim 7, further comprising a step of adding at least one element selected from rare gases and hydrogen to the oxide semiconductor layer with the use of the gate electrode as a mask.

9. The method for manufacturing a semiconductor device, according to claim 7, wherein the oxide semiconductor layer comprises a non-single-crystal semiconductor.

10. The method according to claim 7, wherein the second insulating film contains hydrogen at a concentration of 0.1 at. % and lower than or equal to 25 at. %.

11. A semiconductor device comprising:

a first insulating film comprising oxygen;

an oxide semiconductor layer formed over and in contact with the first insulating film, the oxide semiconductor layer comprising indium, wherein the oxide semiconductor layer includes a channel formation region and a source region and a drain region with the channel formation region therebetween;

a gate insulating layer over the oxide semiconductor layer;

a gate electrode over the channel formation region with the gate insulating layer therebetween;

a second insulating film comprising silicon oxide over the gate electrode;

a third insulating film comprising aluminum oxide over the second insulating film; and

a source electrode and a drain electrode electrically connected to the source region and the drain region through contact holes provided in the second insulating film and the third insulating film, respectively,

wherein the first insulating film comprises oxygen and is capable of supplying oxygen to the oxide semiconductor layer,

wherein an amount of oxygen released from the first insulating film is greater than or equal to 3.0×

10²⁰ atoms/cm³ in thermal desorption spectroscopy when the amount of oxygen is converted into oxygen atoms,

wherein at least a portion of the oxide semiconductor layer comprises a crystalline region where a c-axis is aligned approximately in parallel with a normal vector of a surface of the portion of the oxide semiconductor layer and a portion of the oxide semiconductor layer is amorphous, and

wherein the source region and the drain region are selectively doped with at least one element selected from rare gases and hydrogen.

12. The semiconductor device according to claim 11, wherein the source region and the drain region are formed by a self-aligned process using the gate electrode as a mask.

13. The semiconductor device according to claim 11, wherein the first insulating film comprises SiO_x where x is larger than 2.

14. The semiconductor device according to claim 11, wherein the second insulating film contains hydrogen at a concentration of 0.1 at. % and lower than or equal to 25 at. %.

15. The semiconductor device according to claim 11, further comprising a transistor in which a channel formation region comprises single crystal silicon, wherein one of the source region and the drain region of the oxide semiconductor layer is electrically connected to a gate electrode of the transistor in which the channel formation region comprises single crystal silicon.

16. The semiconductor device according to claim 11, wherein the gate electrode comprises a first layer including tantalum nitride and a second layer including tungsten over the first layer.

17. A semiconductor device comprising:

a first insulating film comprising oxygen;

an oxide semiconductor layer formed over and in contact with the first insulating film, the oxide semiconductor layer comprising indium, wherein the oxide semiconductor layer includes a channel formation region and a source region and a drain region with the channel formation region therebetween;

a gate insulating layer over the oxide semiconductor layer;

a gate electrode over the channel formation region with the gate insulating layer therebetween;

a second insulating film comprising silicon oxide over the gate electrode;

a third insulating film comprising aluminum oxide over the second insulating film; and

a source electrode and a drain electrode electrically connected to the source region and the drain region through contact holes provided in the second insulating film and the third insulating film, respectively,

wherein a concentration of rare gas in the source region and the drain region is higher than a concentration of rare gas in the channel formation region,

wherein the concentration of rare gas included in the source region and the drain region is higher than or equal to 5×

10¹⁹ atoms/cm³ and lower than or equal to 1×

10²² atoms/cm³, and

wherein at least a portion of the oxide semiconductor layer comprises a crystalline region where a c-axis is aligned approximately in parallel with a normal vector of a surface of the portion of the oxide semiconductor layer and a portion of the oxide semiconductor layer is amorphous.

18. The semiconductor device according to claim 17, wherein the source region and the drain region are formed by a self-aligned process using the gate electrode as a mask.

19. The semiconductor device according to claim 17, wherein a concentration of hydrogen included in the source region and the drain region is higher than or equal to 5×

10¹⁹ atoms/cm³ and lower than or equal to 1×

10²² atoms/cm³.

20. The semiconductor device according to claim 17, further comprising a transistor in which a channel formation region comprises single crystal silicon, wherein one of the source region and the drain region of the oxide semiconductor layer is electrically connected to a gate electrode of the transistor in which the channel formation region comprises single crystal silicon.