Impedance matching network and method

• US 10,720,309 B1
• Filed: 04/08/2020
• Issued: 07/21/2020
• Est. Priority Date: 07/10/2017
• Status: Active Grant

• Current Assignee: ASM America Incorporated (ASM International NV)
• Original Assignee: Reno Technologies Inc.
• Inventors: Lozic, Tomislav, Kandampalayam, Bala, Ulrich, Michael, Bhutta, Imran, Decker, Ronald
• Primary Examiner(s): Jones, Stephen E.
• Application Number:
  US16/843,138
• Publication Number:
  US 20200234927A1
• Time in Patent Office: 104 Days
• Field of Search: 333 173, 333 32, 333 33, 333 99 PL
• CPC Class Codes: H01J 2237/332 Coating
• CPC Class Codes: H01J 2237/334 Etching
• CPC Class Codes: H01J 37/32183 Matching circuits
• CPC Class Codes: H01L 21/02274 in the presence of a plasma [PECVD]
• CPC Class Codes: H01L 21/28556 by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD H01L21/28518 - H01L21/28537 and H01L21/28568 take precedence
• CPC Class Codes: H01L 21/31116 by dry-etching
• CPC Class Codes: H01L 21/31138 by dry-etching
• CPC Class Codes: H01L 21/32136 using plasmas
• CPC Class Codes: H01L 21/67069 for drying etching
• CPC Class Codes: H03H 7/38 Impedance-matching networks
• CPC Class Codes: H03H 7/40 Automatic matching of load impedance to source impedance

Abstract

In one embodiment, the present disclosure is directed to a method for impedance matching. The RF source provides at least two repeating, non-zero pulse levels, including a high-priority pulse level and a low-priority pulse level. The matching network comprises at least one EVC, which comprises discrete capacitors configured to switch in and out to provide a plurality of match configurations. Each EVC has a switching limit comprising a predetermined number of switches in or out of the EVC'"'"'s discrete capacitors in a prior time interval. Upon determining that switching to a new match configuration would cause an EVC to reach the switching limit, the method determines whether the new match configuration is for the low- or high-priority pulse level. If for the low-priority pulse level, the method prevents the switching of the EVC. If for the high-priority pulse level, the method switches the EVC to the new match configuration.

Claims

1. A matching network comprising:

a) an RF input configured to operably couple to an RF source, the RF source configured to provide at least two repeating, non-zero pulse levels, the at least two pulse levels comprising a high-priority pulse level and a low-priority pulse level;

b) an RF output configured to operably couple to a plasma chamber having a variable impedance; and

c) at least one electronically variable capacitor (EVC), each EVC comprising discrete capacitors configured to switch in and out to vary a capacitance of the EVC and provide a plurality of match configurations for reducing a reflected power at an output of the RF source as the variable impedance of the plasma chamber changes;

d) wherein each EVC of the at least one EVC has a switching limit comprising a predetermined number of switches in or out of the EVC'"'"'s discrete capacitors in a prior time interval of a predetermined time; and

e) a control circuit configured to carry out the steps of;

i) determining a parameter value related to the plasma chamber or the matching network;

ii) determining a new match configuration for the at least one EVC based on the determined parameter value;

iii) upon determining that switching the at least one EVC to the new match configuration would cause one or more of the at least one EVC to reach the switching limit, determining whether the new match configuration is for the low-priority pulse level or the high-priority pulse level;

iv) upon determining in step iii) that the new match configuration is for the low-priority pulse level, preventing the switching of the at least one EVC to the new match configuration; and

v) upon determining in step iii) that the new match configuration is for the high-priority pulse level, switching the at least one EVC to the new match configuration.

2. The matching network of claim 1 further comprising, upon determining that switching the at least one EVC to the new match configuration would not cause the at least one EVC to reach a switching limit, switching the at least one EVC to the new match configuration.

3. The matching network of claim 1 further comprising, upon determining that the switching limit has been reached:

preventing the switching of the at least one EVC to the new match configuration; and

repeating step i) to step v).

4. The matching network of claim 1 wherein a maximum number of the discrete capacitors of each EVC that may be switched in or out is based on a frequency of the at least two pulse levels.

5. The matching network of claim 1:

wherein the predetermined number of switches is 1500 switches; and

wherein the prior time interval of the predetermined time is 15 milliseconds.

6. The matching network of claim 1 wherein the high-priority pulse level has a greater amplitude than the low-priority pulse level.

7. The matching network of claim 1 wherein the high-priority pulse level has a smaller amplitude than the low-priority pulse level.

8. The matching network of claim 1 further comprising repeating steps i) to v) for a subsequent expected pulse level change.

9. The matching network of claim 1 wherein the determination of the new match configuration is further based on an amplitude of an upcoming pulse level of the at least two pulse levels.

10. A semiconductor processing tool comprising:

a) a plasma chamber having a variable impedance and configured to deposit a material onto a substrate or etch a material from a substrate; and

b) an impedance matching network operably coupled to the plasma chamber, the matching network comprising;

i) an RF input configured to operably couple to an RF source, the RF source configured to provide at least two repeating, non-zero pulse levels, the at least two pulse levels comprising a high-priority pulse level and a low-priority pulse level;

ii) an RF output configured to operably couple to the plasma chamber; and

iii) at least one electronically variable capacitor (EVC), each EVC comprising discrete capacitors configured to switch in and out to vary a capacitance of the EVC and provide a plurality of match configurations for reducing a reflected power at an output of the RF source as the variable impedance of the plasma chamber changes;

iv) wherein each EVC of the at least one EVC has a switching limit comprising a predetermined number of switches in or out of the EVC'"'"'s discrete capacitors in a prior time interval of a predetermined time; and

v) a control circuit configured to carry out the steps of;

1) determining a parameter value related to the plasma chamber or the matching network;

2) determining a new match configuration for the at least one EVC based on the determined parameter value;

3) upon determining that switching the at least one EVC to the new match configuration would cause one or more of the at least one EVC to reach the switching limit, determining whether the new match configuration is for the low-priority pulse level or the high-priority pulse level;

4) upon determining in step

     3) that the new match configuration is for the low-priority pulse level, preventing the switching of the at least one EVC to the new match configuration; and

5) upon determining in step

     3) that the new match configuration is for the high-priority pulse level, switching the at least one EVC to the new match configuration.

11. A method for impedance matching comprising:

a) positioning a matching network between a radio frequency (RF) source and a plasma chamber, wherein;

i) the RF source is configured to provide at least two repeating, non-zero pulse levels, the at least two pulse levels comprising a high-priority pulse level and a low-priority pulse level;

ii) the plasma chamber has a variable impedance; and

iii) the matching network comprises at least one electronically variable capacitor (EVC), each EVC comprising discrete capacitors configured to switch in and out to vary a capacitance of the EVC and provide a plurality of match configurations for reducing a reflected power at an output of the RF source as the variable impedance of the plasma chamber changes;

iv) each EVC of the at least one EVC has a switching limit comprising a predetermined number of switches in or out of the EVC'"'"'s discrete capacitors in a prior time interval of a predetermined time;

b) determining a parameter value related to the plasma chamber or the matching network;

c) determining a new match configuration for the at least one EVC based on the determined parameter value;

d) upon determining that switching the at least one EVC to the new match configuration would cause one or more of the at least one EVC to reach the switching limit, determining whether the new match configuration is for the low-priority pulse level or the high-priority pulse level;

e) upon determining in step d) that the new match configuration is for the low-priority pulse level, preventing the switching of the at least one EVC to the new match configuration; and

f) upon determining in step d) that the new match configuration is for the high-priority pulse level, switching the at least one EVC to the new match configuration.

12. The method of claim 11 further comprising, upon determining that switching the at least one EVC to the new match configuration would not cause the at least one EVC to reach a switching limit, switching the at least one EVC to the new match configuration.

13. The method of claim 11 further comprising, upon determining that the switching limit has been reached:

preventing the switching of the at least one EVC to the new match configuration; and

repeating step b) to step f).

14. The method of claim 11 wherein a maximum number of the discrete capacitors of each EVC that may be switched in or out is based on a frequency of the at least two pulse levels.

15. The method of claim 11:

wherein the predetermined number of switches is 1500 switches; and

wherein the prior time interval of the predetermined time is 15 milliseconds.

16. The method of claim 11 wherein the high-priority pulse level has a greater amplitude than the low-priority pulse level.

17. The method of claim 11 wherein the high-priority pulse level has a smaller amplitude than the low-priority pulse level.

18. The method of claim 11 further comprising repeating steps b) to f) for a subsequent expected pulse level change.

19. The method of claim 11 wherein the determination of the new match configuration is further based on an amplitude of an upcoming pulse level of the at least two pulse levels.

20. A method of manufacturing a semiconductor, the method comprising:

a) placing a substrate in a plasma chamber configured to deposit a material layer onto the substrate or etch a material layer from the substrate;

b) coupling an impedance matching network between an RF source and the plasma chamber, wherein;

i) the RF source is configured to provide at least two repeating, non-zero pulse levels, the at least two pulse levels comprising a high-priority pulse level and a low-priority pulse level;

ii) the plasma chamber has a variable impedance; and

iii) the matching network comprises at least one electronically variable capacitor (EVC), each EVC comprising discrete capacitors configured to switch in and out to vary a capacitance of the EVC and provide a plurality of match configurations for reducing a reflected power at an output of the RF source as the variable impedance of the plasma chamber changes;

iv) each EVC of the at least one EVC has a switching limit comprising a predetermined number of switches in or out of the EVC'"'"'s discrete capacitors in a prior time interval of a predetermined time; and

c) performing impedance matching by;

i) determining a parameter value related to the plasma chamber or the matching network;

ii) determining a new match configuration for the at least one EVC based on the determined parameter value;

iii) upon determining that switching the at least one EVC to the new match configuration would cause one or more of the at least one EVC to reach the switching limit, determining whether the new match configuration is for the low-priority pulse level or the high-priority pulse level;

iv) upon determining in step iii) that the new match configuration is for the low-priority pulse level, preventing the switching of the at least one EVC to the new match configuration; and

v) upon determining in step iii) that the new match configuration is for the high-priority pulse level, switching the at least one EVC to the new match configuration.