Semiconductor device and manufacturing method thereof

• US 10,720,451 B2
• Filed: 08/15/2017
• Issued: 07/21/2020
• Est. Priority Date: 12/25/2008
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei
• Primary Examiner(s): Au, Bac H
• Application Number:
  US15/677,379
• Publication Number:
  US 20170373172A1
• Time in Patent Office: 1,071 Days
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

An object is to reduce a capacitance value of parasitic capacitance without decreasing driving capability of a transistor in a semiconductor device such as an active matrix display device. Further, another object is to provide a semiconductor device in which the capacitance value of the parasitic capacitance was reduced, at low cost. An insulating layer other than a gate insulating layer is provided between a wiring which is formed of the same material layer as a gate electrode of the transistor and a wiring which is formed of the same material layer as a source electrode or a drain electrode.

Claims

1. A semiconductor device comprising a pixel portion, and a connection portion with a FPC,

the pixel portion comprising:

a first conductive layer;

a first insulating layer over the first conductive layer;

an oxide semiconductor layer over the first insulating layer;

a second conductive layer electrically connected to the oxide semiconductor layer;

a third conductive layer electrically connected to the oxide semiconductor layer;

a second insulating layer over the oxide semiconductor layer, the second conductive layer, and the third conductive layer; and

a pixel electrode over the second insulating layer and electrically connected to the third conductive layer,

wherein the first conductive layer and the second conductive layer cross each other in a cross shape and overlap each other in a first region,

wherein the first region overlaps a first transparent conductive layer,

wherein a gate wiring and a gate electrode of a transistor are formed from the first conductive layer,

wherein the first conductive layer comprises a region overlapping the oxide semiconductor layer with the first insulating layer interposed therebetween,

wherein a source wiring and one of a source electrode and a drain electrode of the transistor are formed from the second conductive layer, and

wherein the other of the source electrode and the drain electrode of the transistor is formed from the third conductive layer,

the connection portion comprising;

a fourth conductive layer formed from a same layer as the first conductive layer and comprises a same material as the first conductive layer;

a fifth conductive layer formed from a same layer as the second conductive layer and comprises a same material as the second conductive layer; and

a second transparent conductive layer comprising a same material as the first transparent conductive layer,

wherein an electrode or a wiring formed from the second transparent conductive layer is electrically connected to the FPC,

wherein a top surface of the fifth conductive layer comprises a region in contact with the second transparent conductive layer, and

wherein a top surface of the fourth conductive layer comprises a region in contact with the fifth conductive layer.

2. A semiconductor device according to claim 1, further comprising a liquid crystal layer over the pixel electrode.

3. A semiconductor device according to claim 1, further comprising a light-emitting layer over the pixel electrode.

4. A semiconductor device according to claim 1, wherein the oxide semiconductor layer includes indium, zinc, and gallium.

5. A semiconductor device comprising a pixel portion, and a connection portion with a FPC,

the pixel portion comprising:

a first conductive layer;

a first insulating layer over the first conductive layer;

an oxide semiconductor layer over the first insulating layer;

a second conductive layer electrically connected to the oxide semiconductor layer;

a third conductive layer electrically connected to the oxide semiconductor layer;

a second insulating layer over the oxide semiconductor layer, the second conductive layer, and the third conductive layer;

a pixel electrode over the second insulating layer and electrically connected to the third conductive layer; and

a first transparent conductive layer comprising a same material as the pixel electrode,

wherein the first conductive layer and the second conductive layer cross each other in a cross shape and overlap each other in a first region,

wherein the first region overlaps the first transparent conductive layer,

wherein a gate wiring and a gate electrode of a transistor are formed from the first conductive layer,

wherein the first conductive layer comprises a region overlapping the oxide semiconductor layer with the first insulating layer interposed therebetween,

wherein a source wiring and one of a source electrode and a drain electrode of the transistor are formed from the second conductive layer, and

wherein the other of the source electrode and the drain electrode of the transistor is formed from the third conductive layer,

the connection portion comprising;

a fourth conductive layer formed from a same layer as the first conductive layer and comprises a same material as the first conductive layer;

a fifth conductive layer formed from a same layer as the second conductive layer and comprises a same material as the second conductive layer; and

a second transparent conductive layer comprising a same material as the first transparent conductive layer,

wherein an electrode or a wiring formed from the second transparent conductive layer is electrically connected to the FPC,

wherein a top surface of the fifth conductive layer comprises a region in contact with the second transparent conductive layer, and

wherein a top surface of the fourth conductive layer comprises a region in contact with the fifth conductive layer.

6. A semiconductor device according to claim 5, further comprising a liquid crystal layer over the pixel electrode.

7. A semiconductor device according to claim 5, further comprising a light-emitting layer over the pixel electrode.

8. A semiconductor device according to claim 5, wherein the oxide semiconductor layer includes indium, zinc, and gallium.