Tamper detector
First Claim
Patent Images
1. A tamper detection device, comprising:
- a detection circuit, wherein the detection circuit further comprises;
a reference oscillator, anda detection oscillator having an inductance (L) in combination with a capacitance (C) embedded in the detection circuit, anda detection element comprising a conductor on an opposite side from the detection circuit, wherein the detection circuit is configured tocount a number of detection oscillator clock cycles,compare the counted number of detection oscillator clock cycles to a number of reference oscillator clock cycles,set a detection element status to an undisturbed status after the counted number of detection oscillator clock cycles is within a predetermined tolerance range, wherein the predetermined tolerance range is defined between a low count threshold and a high count threshold,set the detection element status to a disturbed status after the counted number of detection oscillator clock cycles is either above the high count threshold or below the low count threshold,powered by a near-field-communication (NFC) signal,store the detection element status, andelectrically report the detection element status in response to a wireless query signal.
1 Assignment
0 Petitions
Accused Products
Abstract
A tamper detection device includes a detection circuit, configured to be powered by a near-field-communication (NFC) signal and store a status of a detection element; wherein the detection circuit is configured to set the status to undisturbed in response to an undisturbed state of the detection element; wherein the detection circuit is configured to set the status to disturbed in response to a disturbed state of the detection element; and wherein the detection circuit is configured to electrically report the detection element status in response to a wireless query signal.
68 Citations
17 Claims
-
1. A tamper detection device, comprising:
-
a detection circuit, wherein the detection circuit further comprises; a reference oscillator, and a detection oscillator having an inductance (L) in combination with a capacitance (C) embedded in the detection circuit, and a detection element comprising a conductor on an opposite side from the detection circuit, wherein the detection circuit is configured to count a number of detection oscillator clock cycles, compare the counted number of detection oscillator clock cycles to a number of reference oscillator clock cycles, set a detection element status to an undisturbed status after the counted number of detection oscillator clock cycles is within a predetermined tolerance range, wherein the predetermined tolerance range is defined between a low count threshold and a high count threshold, set the detection element status to a disturbed status after the counted number of detection oscillator clock cycles is either above the high count threshold or below the low count threshold, powered by a near-field-communication (NFC) signal, store the detection element status, and electrically report the detection element status in response to a wireless query signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
-
-
15. A method for tamper detection, comprising:
-
powering a detection circuit with a near-field-communication (NFC) signal; counting, with a detection element comprising a conductor on an opposite side from the detection circuit, a number of detection oscillator clock cycles; comparing, with the detection element, the counted number of detection oscillator clock cycles to a number of reference oscillator clock cycles, wherein the detection oscillator has an inductance (L) in combination with a capacitance (C) embedded in the detection circuit; setting, with the detection element, a status of a detection element to an undisturbed status after the counted number of detection oscillator clock cycles is within a predetermined tolerance range, wherein the predetermined tolerance range is defined between a low count threshold and a high count threshold; setting, with the detection element, the status of the detection element to a disturbed status after the counted number of detection oscillator clock cycles is either above the high count threshold or below the low count threshold; and reporting the detection element status in response to a wireless query signal. - View Dependent Claims (16, 17)
-
Specification