Transcendental function evaluation

• US 10,725,742 B2
• Filed: 06/05/2018
• Issued: 07/28/2020
• Est. Priority Date: 06/05/2018
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Viswanathan Pillai, Prasanth, Poley, Richard Mark, Natarajan, Venkatesh, Tessarolo, Alexander
• Primary Examiner(s): Mai, Tan V
• Application Number:
  US16/000,736
• Publication Number:
  US 20190369962A1
• Time in Patent Office: 784 Days
• Field of Search: 708277
• CPC Class Codes: G06F 7/544 for evaluating functions by calculation G06F7/4824 takes precedence
• CPC Class Codes: G06F 7/548 Trigonometric functions; Co-ordinate transformations

Abstract

In described examples, an apparatus is arranged to generate a linear term, a quadratic term, and a constant term of a transcendental function with, respectively, a first circuit, a second circuit, and a third circuit in response to least significant bits of an input operand and in response to, respectively, a first, a second, and a third table value that is retrieved in response to, respectively, a first, a second, and a third index generated in response to most significant bits of the input operand. The third circuit is further arranged to generate a mantissa of an output operand in response to a sum of the linear term, the quadratic term, and the constant term.

Claims

1. An apparatus, comprising:

a first circuit arranged to generate a linear term of a transcendental function in response to a set of least significant bits of an input operand and in response to a first table value that is retrieved from a first table in response to a first index generated in response to a set of most significant bits of the input operand;

a second circuit arranged to generate a quadratic term for the transcendental function in response to the set of least significant bits of the input operand and in response to a second table value that is retrieved from a second table in response to a second index generated in response to the set of most significant bits of the input operand; and

a third circuit arranged to generate a constant term for the transcendental function in response to the set of least significant bits of the input operand and in response to a third table value that is retrieved from a third table in response to a third index generated in response to the set of most significant bits of the input operand, and wherein the third circuit is arranged to generate an output operand in response to a sum of the linear term, the quadratic term, and the constant term.

2. The apparatus of claim 1, wherein the first circuit and the second circuit are arranged as parallel branches of a hardware pipeline to respectively generate the linear term and the quadratic term in parallel.

3. The apparatus of claim 1, wherein the third circuit is programmable to generate the output operand as either a logarithmic result or an exponentiated result in response to a command generated by an external processor.

4. The apparatus of claim 1, wherein the first table, the second table and the third table are different tables.

5. The apparatus of claim 1, wherein the output operand for the transcendental function is generated in response to quadratic approximations formed with the linear term, the quadratic term, and the constant term.

6. The apparatus of claim 1, wherein the third circuit is arranged to selectively generate the output operand as a result as one of an exponential function and a logarithmic function.

7. The apparatus of claim 1, wherein the transcendental function is an exponential function, wherein the first index is further generated in response to an exponent of the input operand, wherein the second index is further generated in response to the exponent of the input operand, and wherein the third index is further generated in response to the exponent of the input operand.

8. The apparatus of claim 1, wherein the output operand for the transcendental function is generated in response to quadratic approximations of the linear term, the quadratic term, and the constant term, and wherein the quadratic approximations of the linear term, the quadratic term, and the constant term are respectively generated in response to the first circuit, the second circuit, and the third circuit are arranged to truncate and discard lower order bits to produce, respectively the linear term, the quadratic term, and the constant term.

9. The apparatus of claim 1, wherein the apparatus comprises an execution unit configured to receive the input operand from registers of a floating point unit (FPU).

10. The apparatus of claim 9, wherein the execution unit is configured to write the output operand into the registers of the FPU.

11. The apparatus of claim 1, wherein the output operand is arranged to provide an input signal to a system to be controlled, and the input operand is responsive to a difference between an output state of the system to be controlled and a target state of the system to be controlled.

12. The apparatus of claim 1, wherein the first table value retrieved from the first table in response to the first index, the second table value retrieved from the second table in response to the second index, and the third table value retrieved from the third table in response to the third index are produced from one of a sequence of non-equally spaced segments addressed by an mantissa and exponent of the input operand for an approximation of a value of the transcendental function.

13. A system, comprising:

a processor arranged to generate an input operand for hardware accelerated calculation of a transcendental function;

a memory configured to receive and store the input operand; and

an execution unit arranged to generate as an approximation of a transcendental function in response to the input operand stored and retrieved from the memory, comprising;

a first circuit arranged to generate a linear term of the transcendental function in response to a set of least significant bits of a mantissa of the input operand and in response to a first table value that is retrieved from a first table in response to a first index generated in response to a set of most significant bits of the mantissa of the input operand;

a second circuit arranged to generate a quadratic term for the transcendental function in response to the set of least significant bits of the mantissa of the input operand and in response to a second table value that is retrieved from a second table in response to a second index generated in response to the set of most significant bits of the mantissa of the input operand; and

a third circuit arranged to generate a constant term for the transcendental function in response to a third table value that is retrieved from a third table in response to a third index generated in response to the set of most significant bits of the mantissa of the input operand, and wherein the third circuit is arranged to generate an output operand in response to a sum of the linear term, the quadratic term, and the constant term.

14. The system of claim 13, wherein the output operand for the transcendental function is generated in response to quadratic approximations formed with the linear term, the quadratic term, and the constant term.

15. The system of claim 13, wherein the transcendental function is an exponential function, wherein the first index is further generated in response to the set of least significant bits of an exponent of the input operand, wherein the second index is further generated in response to the set of least significant bits of the exponent of the input operand, and wherein the third index is further generated in response to the set of least significant bits of the exponent of the input operand.

16. The system of claim 13, wherein the output operand for the transcendental function is generated in response to quadratic approximations of the linear term, the quadratic term, and the constant term, and wherein the quadratic approximations of the linear term, the quadratic term, and the constant term are respectively generated in response to the first circuit, the second circuit, and the third circuit are arranged to truncate and discard lower order bits to produce, respectively the linear term, the quadratic term, and the constant term.

17. A method, comprising:

generating, by a first circuit of a first pipeline stage, a linear term of a transcendental function in response to a set of least significant bits of an input operand and in response to a first table value that is retrieved from a first table in response to a first index generated in response to a set of most significant bits of the input operand;

generating, by a second circuit of the first pipeline stage, a quadratic term for the transcendental function in response to the set of least significant bits of the input operand and in response to a second table value that is retrieved from a second table in response to a second index generated in response to the set of most significant bits of the input operand;

generating, by a third circuit of a second pipeline stage that follows the first pipeline stage, a constant term for the transcendental function in response to the set of least significant bits of the input operand and in response to a third table value that is retrieved from a third table in response to a third index generated in response to the set of most significant bits of the input operand; and

generating, by a fourth circuit of the second pipeline stage, an output operand in response to a sum of the linear term, the quadratic term, and the constant term.

18. The method of claim 17, wherein the output operand for the transcendental function is generated in response to quadratic approximations formed with the linear term, the quadratic term, and the constant term.

19. The method of claim 17, wherein the transcendental function is an exponential function, wherein the first index is further generated in response to an exponent of the input operand, wherein the second index is further generated in response to the exponent of the input operand, and wherein the third index is further generated in response to the exponent of the input operand.

20. The method of claim 17, wherein the output operand for the transcendental function is generated in response to quadratic approximations of the linear term, the quadratic term, and the constant term, and wherein the quadratic approximations of the linear term, the quadratic term, and the constant term are respectively generated by the first circuit, the second circuit, and the third circuit truncating and discarding lower order bits to produce, respectively the linear term, the quadratic term, and the constant term.