×

Trimming MRAM sense amp with offset cancellation

  • US 10,726,897 B1
  • Filed: 05/14/2019
  • Issued: 07/28/2020
  • Est. Priority Date: 05/14/2019
  • Status: Active Grant
First Claim
Patent Images

1. A sense amplifier circuit for sensing a data state of a data cell, comprising:

  • a first leg comprising a first transistor and a second leg comprising a second transistor, wherein the sense amplifier circuit is configured to perform a two-phase read comprising;

    a first phase in which the first transistor is coupled to a reference resistance circuitry and the second transistor is coupled to a data resistance circuitry, anda second phase in which the first transistor is coupled to the data resistance circuitry and the second transistor is coupled to the reference resistance circuitry;

    a reference trim circuitry coupled to the reference resistance circuitry and a data trim circuitry coupled to the data resistance circuitry, the reference trim circuitry and data trim circuitry configured to correct for device mismatch errors relating to the two-phase read of the sense amplifier circuit; and

    a comparator circuit configured to output the data state of the data cell based on input of a first voltage related to a reference resistance and a second voltage related to a data resistance.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×