Methods for forming a semiconductor device structure and related semiconductor device structures

• US 10,734,497 B2
• Filed: 07/17/2018
• Issued: 08/04/2020
• Est. Priority Date: 07/18/2017
• Status: Active Grant

• Current Assignee: ASM IP Holding B.V. (ASM International NV)
• Original Assignee: ASM IP Holding B.V. (ASM International NV)
• Inventors: Zhu, Chiyu, Shrestha, Kiran, Raisanen, Petri, Givens, Michael Eugene
• Primary Examiner(s): Lee, Kyoung
• Assistant Examiner(s): Sylvia, Christina A
• Application Number:
  US16/038,024
• Publication Number:
  US 20190027573A1
• Time in Patent Office: 749 Days
• CPC Class Codes: C23C 16/34 Nitrides C23C16/303 takes precedence
• CPC Class Codes: C23C 16/45525 Atomic layer deposition [ALD]
• CPC Class Codes: H01L 21/02175 characterised by the metal H01L21/02197 takes precedence
• CPC Class Codes: H01L 21/02205 the layer being characterised by the precursor material for deposition
• CPC Class Codes: H01L 21/0228 deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
• CPC Class Codes: H01L 21/28194 by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition H01L21/28202 takes precedence
• CPC Class Codes: H01L 29/4966 the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2 H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/517 the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence
• CPC Class Codes: H01L 29/66568 Lateral single gate silicon transistors

Abstract

Methods for forming a semiconductor device structure are provided. The methods may include forming a molybdenum nitride film on a substrate by atomic layer deposition by contacting the substrate with a first vapor phase reactant comprising a molybdenum halide precursor, contacting the substrate with a second vapor phase reactant comprise a nitrogen precursor, and contacting the substrate with a third vapor phase reactant comprising a reducing precursor. The methods provided may also include forming a gate electrode structure comprising the molybdenum nitride film, the gate electrode structure having an effective work function greater than approximately 5.0 eV. Semiconductor device structures including molybdenum nitride films are also provided.

Claims

1. A method for forming a semiconductor device structure, the method comprising:

forming a molybdenum nitride film on a substrate by atomic layer deposition, wherein forming the molybdenum nitride film comprises;

contacting the substrate with a first vapor phase reactant comprising a binary molybdenum halide precursor;

after contacting the substrate with the first vapor phase reactant, contacting the substrate with a second vapor phase reactant comprising a nitrogen precursor selected from the group comprising ammonia (NH₃), hydrazine (N₂H₄), triazane (N₃H₅), tertbutylhydrazine (C₄H₉N₂H₃), methylhydrazine (CH₃NHNH₂), and dimethylhydrazine ((CH₃)₂N₂H₂); and

at the same time as or after contacting the substrate with the second vapor phase reactant, contacting the substrate with a third vapor phase reactant comprising a reducing precursor selected from the group comprising hydrogen gas (H₂), silane (SiH₄), disilane (Si₂H₆), trisilane (Si₃H₈), tetrasilane (Si₄H₈), and acetylene (C₂H₂); and

forming a gate electrode structure comprising the molybdenum nitride film, the gate electrode structure having an effective work function greater than approximately 5.0 eV.

2. The method of claim 1, wherein the binary molybdenum halide precursor is selected from the group comprising molybdenum trichloride (MoCl₃), molybdenum tetrachloride (MoCl₄), molybdenum hexachloride (MoCl₆) and molybdenum hexafluoride (MoF₆).

3. The method of claim 1, wherein the nitrogen precursor is selected from the group comprising hydrazine (N₂H₄), triazane (N₃H₅), tertbutylhydrazine (C₄H₉N₂H₃), methylhydrazine (CH₃NHNH₂), and dimethylhydrazine ((CH₃)₂N₂H₂.

4. The method of claim 1, wherein contacting the substrate with the second vapor phase reactant is performed after contacting the substrate with the first vapor phase reactant.

5. The method of claim 4, wherein contacting the substrate with the third vapor phase reactant is performed after contacting the substrate with the second vapor phase reactant.

6. The method of claim 1, wherein the molybdenum nitride film has a thickness of approximately less than 50 Angstroms.

7. The method of claim 1, wherein the molybdenum nitride film has an electrical resistivity of less than 1200 μ

Ω

-cm.

8. The method of claim 1, wherein forming the gate electrode structure further comprises forming the gate electrode structure having an effective work function greater than 5.4 eV.

9. The method of claim 1, wherein forming the molybdenum nitride film further comprises heating the substrate to a temperature greater than approximately 400°

C.

10. The method of claim 1, wherein forming the gate electrode structure comprising the molybdenum nitride film, the gate electrode structure having an effective work function greater than approximately 5.0 eV, further comprises forming the gate electrode structure to have a thickness of less than 30 Angstroms.

11. The method of claim 1, wherein forming the gate electrode structure comprising the molybdenum nitride film, the gate electrode structure having an effective work function greater than approximately 5.0 eV, further comprises forming the gate electrode structure to have an electrical resistivity of less than 1200 μ

Ω

-cm.

12. A reaction system configured for forming the molybdenum nitride film of claim 1.

13. A semiconductor device structure comprising:

a PMOS transistor gate structure, comprising;

a molybdenum nitride film comprising between 30 atomic % and 60 atomic % molybdenum;

a semiconductor body; and

a gate dielectric disposed between the molybdenum nitride film and the semiconductor body,

wherein the PMOS gate structure has an effective work function greater than 5.0 eV.

14. The semiconductor device structure of claim 13, wherein the molybdenum nitride film comprises between 40 atomic % and 50 atomic % molybdenum.

15. The semiconductor device structure of claim 13 wherein the molybdenum nitride film has a thickness of less than 50 Angstroms.

16. The semiconductor device structure of claim 13, wherein the PMOS gate structure has an effective work function greater than 5.4 eV.

17. The semiconductor device structure of claim 13, wherein the molybdenum nitride film has an electrical resistivity of less than 1200 μ

Ω

-cm.

18. The semiconductor device structure of claim 13, wherein the gate dielectric comprises hafnium oxide (HfO₂).

19. A method for forming a semiconductor device structure, the method comprising:

forming a molybdenum nitride film on a substrate by atomic layer deposition, wherein forming the molybdenum nitride film comprises;

contacting the substrate with a first vapor phase reactant comprising a molybdenum halide precursor selected from the group comprising molybdenum trichloride (MoCl₃), molybdenum tetrachloride (MoCl₄), molybdenum hexachloride (MoCl₆), molybdenum hexafluoride (MoF₆), and tetrachloro(cyclopentadienyl)molybdenum, the first vapor phase reactant being free of Nitrogen (N);

after contacting the substrate with the first vapor phase reactant, contacting the substrate with a second vapor phase reactant comprising a nitrogen precursor selected from the group comprising hydrazine (N₂H₄), triazane (N₃H₅), tertbutylhydrazine (C₄H₉N₂H₃), methylhydrazine (CH₃NHNH₂), and dimethylhydrazine ((CH₃)₂N₂H₂); and

contacting the substrate with a third vapor phase reactant comprising a reducing precursor selected from the group comprising hydrogen gas (H₂), silane (SiH₄), disilane (Si₂H₆), trisilane (Si₃H₈), tetrasilane (Si₄H₈), and acetylene (C₂H₂); and

forming a gate electrode structure comprising the molybdenum nitride film, the gate electrode structure having an effective work function greater than approximately 5.0 eV.

20. The method of claim 19, wherein:

contacting the substrate with the second vapor phase reactant is performed after contacting the substrate with the first vapor phase reactant; and

contacting the substrate with the third vapor phase reactant is performed after contacting the substrate with the second vapor phase reactant.