Semiconductor device comprising oxide semiconductor

• US 10,734,530 B2
• Filed: 04/02/2019
• Issued: 08/04/2020
• Est. Priority Date: 09/01/2008
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Akimoto, Kengo
• Primary Examiner(s): Schoenholtz, J. E.
• Application Number:
  US16/372,930
• Publication Number:
  US 20190288120A1
• Time in Patent Office: 490 Days
• Field of Search: None
• CPC Class Codes: H01L 21/02318 post-treatment
• CPC Class Codes: H01L 21/02323 introduction of oxygen
• CPC Class Codes: H01L 21/0234 treatment by exposure to a plasma
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 29/247 Amorphous materials
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

An object is to provide favorable interface characteristics of a thin film transistor including an oxide semiconductor layer without mixing of an impurity such as moisture. Another object is to provide a semiconductor device including a thin film transistor having excellent electric characteristics and high reliability, and a method by which a semiconductor device can be manufactured with high productivity. A main point is to perform oxygen radical treatment on a surface of a gate insulating layer. Accordingly, there is a peak of the oxygen concentration at an interface between the gate insulating layer and a semiconductor layer, and the oxygen concentration of the gate insulating layer has a concentration gradient. The oxygen concentration is increased toward the interface between the gate insulating layer and the semiconductor layer.

Claims

1. A semiconductor device comprising:

a gate electrode layer;

a gate insulating layer over the gate electrode layer;

an oxide semiconductor layer over the gate electrode layer with the gate insulating layer therebetween, the oxide semiconductor layer comprising indium and zinc;

a first region over the oxide semiconductor layer;

a second region over the oxide semiconductor layer,

a third region over the oxide semiconductor layer, wherein each of the first region, the second region and the third region comprises indium and zinc;

a first electrode layer on the first region; and

a second electrode layer on the second region,

a third electrode layer on the third region between the first electrode layer and the second electrode layer,

wherein the first electrode layer is electrically connected to a pixel electrode, and

wherein the second electrode layer is electrically connected to a source line.

2. The semiconductor device according to claim 1, wherein an oxygen concentration in the oxide semiconductor layer at an interface with the gate insulating layer is higher than at a portion distant from the interface.

3. The semiconductor device according to claim 1, wherein the oxide semiconductor layer further comprises gallium.

4. The semiconductor device according to claim 1, wherein each of the first electrode layer and the second electrode layer comprises a metal selected from the group consisting of aluminum, copper, titanium and molybdenum.

5. The semiconductor device according to claim 1, wherein an oxygen concentration in the first region and the second region is lower than an oxygen concentration in the oxide semiconductor layer.

6. A semiconductor device comprising:

a gate electrode layer;

a gate insulating layer over the gate electrode layer;

an oxide semiconductor layer over the gate electrode layer with the gate insulating layer therebetween, the oxide semiconductor layer comprising indium and zinc;

a first region over the oxide semiconductor layer;

a second region over the oxide semiconductor layer,

a third region over the oxide semiconductor layer, wherein each of the first region, the second region and third region comprises indium and zinc;

a first electrode layer on the first region; and

a second electrode layer on the second region,

a third electrode layer on the third region between the first electrode layer and the second electrode layer,

wherein the first electrode layer, the second electrode layer and the third electrode layer overlap with the gate electrode layer,

wherein the first electrode layer is electrically connected to a pixel electrode, and

wherein second electrode layer is electrically connected to a source line.

7. The semiconductor device according to claim 6, wherein each of the first region and the second region comprises crystal grains having a diameter of 1 nm to 10 nm.

8. The semiconductor device according to claim 6, wherein an oxygen concentration in the oxide semiconductor layer at an interface with the gate insulating layer is higher than at a portion distant from the interface.

9. The semiconductor device according to claim 6, wherein each of the first region and the second region further comprises gallium.

10. The semiconductor device according to claim 6, wherein the gate electrode layer comprises a metal selected from the group consisting of titanium, molybdenum, chromium, tantalum, tungsten, aluminum and an alloy thereof.

11. The semiconductor device according to claim 6, wherein an oxygen concentration in the first region and the second region is lower than an oxygen concentration in the oxide semiconductor layer.