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Secured master-slave D type flip-flop circuit

  • US 20010004220A1
  • Filed: 12/19/2000
  • Published: 06/21/2001
  • Est. Priority Date: 12/21/1999
  • Status: Active Grant
First Claim
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1. A master-slave D type flip-flop circuit comprising a master stage followed by a slave stage, the two stages having an identical structure comprising a first pass gate for the transmission, on an internal node, of an input data element, a storage loop with inverters, connected to said internal node to supply a data element at output of the stage and comprising a second pass gate for the transmission, on said internal node, of the data element complementary to the output data element, wherein the flip-flop circuit furthermore comprises a power consumption masking circuit comprising in parallel, at each of the stages, namely the master and slave stage, a reference stage with a similar structure whose storage loop is disconnected from the output of the associated master or slave stage, the second pass gate of the storage loop of the reference stage being connected between the output of the associated master stage or slave stage and the internal node of the reference stage.

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