Method for manufacturing thin film transistor liquid crystal display

• US 20010005596A1
• Filed: 12/13/2000
• Published: 06/28/2001
• Est. Priority Date: 12/24/1999
• Status: Active Grant

• Current Assignee: BOE HYDIS Technology Company Limited (SK Hynix Inc.)
• Original Assignee: BOE HYDIS Technology Company Limited (SK Hynix Inc.)
• Inventors: Lee, Deuk Su, Jun, Jung Mok
• Granted Patent: US 6,500,702 B2
• Time in Patent Office: Days
• US Class Current: 438/29
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask

Abstract

The present invention discloses a method for manufacturing thin film transistor liquid crystal display including the following steps so as to form simultaneously a via hole for contacting a drain electrode and a pixel electrode mutually and the channel of thin film transistor:

forming sequentially gate insulation layer, amorphous silicon layer for channel and doped semiconductor layer for ohmic contact, and metal layer for source/drain electrode on the back substrate where the gate electrode and the storage capacitor electrode have been formed; patterning the metal layer for source/drain electrode and the doped semiconductor layer for ohmic contact through a second photolithograph process so that the source electrode, the drain electrode, and the ohmic contacts thereof may be formed; forming a passivation layer on the back substrate where the source electrode and the drain electrode have been formed; patterning the passivation layer, the amorphous silicon layer for channel, and the gate insulation layer through a third photolithograph process so that a part of the drain electrode and the back substrate portion between the storage capacitor electrode and the thin film transistor may be exposed.

Claims

1. A method for manufacturing thin film transistor liquid crystal display including a pixel electrode and a counter electrode which are so formed on a back substrate that a driving electric field is generated in a liquid crystal cell, thin film transistor which has gate electrode, source electrode, and drain electrode and which apply prescribed picture signal between the pixel electrode and the counter electrode, and a storage capacitor electrode connected to the counter electrode, includes the steps of:

forming a metal layer for gate electrode on the back substrate;

patterning the metal layer for gate electrode through a first photolithograph process so that the gate electrode and the storage capacitor electrode may be formed;

forming sequentially gate insulation layer, amorphous silicon layer for channel and doped semiconductor layer for ohmic contact, and metal layer for source/drain electrode on the back substrate where the gate electrode and the storage capacitor electrode have been formed;

patterning the metal layer for source/drain electrode and the doped semiconductor layer for ohmic contact through a second photolithograph process so that the source electrode, the drain electrode, and the ohmic contacts thereof may be formed;

forming a passivation layer on the back substrate where the source electrode and the drain electrode have been formed;

patterning the passivation layer, the amorphous silicon layer for channel, and the gate insulation layer through a third photolithograph process so that a part of the drain electrode and the back substrate portion between the storage capacitor electrode and the thin film transistor may be exposed;

forming a transparent conductive layer for pixel electrode so as to contact with the exposed portions of the drain electrode and the back substrate;

patterning the transparent conductive layer for pixel electrode through a fourth photolithograph process so that a pixel electrode may be formed to contact with the exposed portion of drain electrode.

2. The method according to

claim 1

, wherein the transparent conductive layer for pixel electrode is ITO (indium tin oxide) layer.