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SHARED EMBEDDED MICROCONTROLLER INTERFACE

  • US 20010007117A1
  • Filed: 03/14/1997
  • Published: 07/05/2001
  • Est. Priority Date: 03/14/1997
  • Status: Active Grant
First Claim
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1. A computer system comprising:

  • a central processing unit adapted to execute operating system code stored in a first memory area and to execute system management code stored in a second memory area;

    an embedded controller including a host interface coupled to said central processing unit;

    a first interrupt output coupled to said central processing unit, said first interrupt being used by said central processing unit during the execution of said operating system code; and

    a second interrupt output coupled to said central processing unit, said second interrupt being used by said central processing unit during the execution of said system management code; and

    said embedded controller coupled to at least one system device in said computer system, said central processing unit communicating with said embedded controller via said host interface and said first and second interrupts while executing said operating system code and said system management code such that said central processing unit is capable of at least one of monitoring and controlling said system device via said embedded controller.

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