Common mode bias generator

• US 20010007418A1
• Filed: 12/12/2000
• Published: 07/12/2001
• Est. Priority Date: 12/14/1999
• Status: Active Grant

• Current Assignee: Socionext Inc.
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Hirata, Takashi, Takahashi, Satoshi, Terada, Yutaka, Komatsu, Yoshihide, Akamatsu, Hironori
• Granted Patent: US 6,262,568 B1
• Time in Patent Office: Days
• US Class Current: 323/280
• CPC Class Codes: G05F 3/205 Substrate bias-voltage generators for static stores G11C5/146

Abstract

An inventive potential generator generates a predetermined potential and includes first operational amplifier, current supply circuit and current sink circuit. A first reference potential is applied to the non-inverting input terminal of the first amplifier and a potential at the output node of the first amplifier is not only applied to the inverting input terminal of the first amplifier but also used as the output of the generator. The current supply circuit supplies a current to the output node of the first amplifier if the potential at the output node of the first amplifier is lower than a predefined level. And the current sink circuit drains a current from the output node of the first amplifier if the potential at the output node of the first amplifier is higher than the predefined level.

Claims

1. A potential generator for generating a predetermined potential, the generator comprising:

a first operational amplifier with a non-inverting input terminal, an inverting input terminal and an output node, where a first reference potential is applied to the non-inverting input terminal of the first amplifier and a potential at the output node of the first amplifier is not only applied to the inverting input terminal of the first amplifier but also used as the output of the generator;

a current supply circuit for supplying a current to the output node of the first amplifier if the potential at the output node of the first amplifier is lower than a predefined level; and

a current sink circuit for draining a current from the output node of the first amplifier if the potential at the output node of the first amplifier is higher than the predefined level.

2. The generator of

claim 1

, wherein the current supply circuit comprises:

a second operational amplifier with a non-inverting input terminal, an inverting input terminal and an output node, where the potential at the output node of the first amplifier is applied to one of the non-inverting and inverting input terminals of the second amplifier, while a second reference potential is applied to the other input terminal of the second amplifier; and

a first transistor, which is connected between a power supply node and the output node of the first amplifier and which turns ON or OFF responsive to the output of the second amplifier, the power supply node receiving a supply voltage, and

wherein the current sink circuit comprises;

a third operational amplifier with a non-inverting input terminal, an inverting input terminal and an output node, where the potential at the output node of the first amplifier is applied to one of the non-inverting and inverting input terminals of the third amplifier, while a third reference potential is applied to the other input terminal of the third amplifier; and

a second transistor, which is connected between the output node of the first amplifier and a ground node and which turns ON or OFF responsive to the output of the third amplifier.

3. The generator of

claim 2

, wherein the second reference potential is lower than the first reference potential, and

wherein the third reference potential is higher than the first reference potential.

4. The generator of

claim 2

, wherein the second amplifier has a negative offset, and

wherein the third amplifier has a positive offset.

5. The generator of

claim 1

, further comprising a current source for draining a current from the output node of the first amplifier if the potential at the output node of the first amplifier needs to be decreased to zero volts while the generator is being driven.

6. The generator of

claim 2

, further comprising a controller for setting the third reference potential to zero volts if the potential at the output node of the first amplifier needs to be decreased to zero volts while the generator is being driven.

7. The generator of

claim 1

, further comprising a limiter for setting the potential at the output node of the first amplifier to the predefined level when the generator is powered.

8. The generator of

claim 7

, wherein the limiter comprises a p-channel MOS transistor, which is diode-connected between a power supply node and the output node of the first amplifier, the power supply node receiving a supply voltage.

9. The generator of

claim 1

, further comprising a current source for supplying a current in a prescribed amount to the output node of the first amplifier for a certain period of time after the generator has been powered.

10. The generator of

claim 1

, further comprising a plurality of resistors that are connected in series together between the output node of the first amplifier and a ground node.

11. The generator of

claim 10

, further comprising a plurality of capacitors, each said capacitor being connected between a node, at which an associated pair of the resistors is interconnected, and the output node of the first amplifier.

12. The generator of

claim 10

, further comprising a fourth operational amplifier with a non-inverting input terminal, an inverting input terminal and an output node, where the potential at the output node of the first amplifier is applied to the non-inverting input terminal of the fourth amplifier and a potential at the output node of the fourth amplifier is applied to the inverting input terminal of the fourth amplifier, and

wherein the resistors are connected in series together between the output node of the fourth amplifier and the ground node.

13. The generator of

claim 1

, further comprising a current source for supplying a constant amount of current to the output node of the first amplifier.