Solid-state imaging device

• US 20010012133A1
• Filed: 12/04/2000
• Published: 08/09/2001
• Est. Priority Date: 12/06/1999
• Status: Active Grant

• Current Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Original Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Inventors: Yoneda, Tomoya, Kochi, Tetsunobu, Sugawa, Shigetoshi, Koizumi, Toru
• Granted Patent: US 7,016,089 B2
• Time in Patent Office: Days
• US Class Current: 358/482
• CPC Class Codes: H01L 27/14603 Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70
• CPC Class Codes: H01L 27/14623 Optical shielding
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H04N 1/195 the array comprising a two-dimensional array or a combination of two-dimensional arrays

Abstract

To control the potential distribution generated in a well at the time of amplification and reduce a shading in a solid-state imaging device of amplification type, the amplification type solid-state imaging device of the present invention comprises a plurality of picture elements each including photoelectric conversion elements formed in a second conductivity type common well inside a first conductivity type substrate, wherein a plurality of well contacts are disposed inside a picture element array area.

Claims

1. A solid-state imaging device of an amplification type, comprising a plurality of picture elements arranged two-dimensionally each including a photoelectric conversion element and a transistor for amplification,

wherein a semiconductor light-receiving region of a first conductivity type serving as each photoelectric conversion element is disposed in a common well comprising a semiconductor of a second conductivity type formed in a semiconductor substrate of the first conductivity type,

wherein a semiconductor region of the first conductivity type serving as a source and drain of each transistor for amplification is disposed in the common well, and

wherein a plurality of contacts for supplying a reference voltage to the common well are disposed inside a picture element array area of the common well.

2. The solid-state imaging device according to

claim 1

, wherein the plurality of the contacts are disposed inside the picture element array area at determined intervals.

3. The solid-state imaging device according to

claim 2

, wherein the contact is disposed for each picture element.

4. The solid-state imaging device according to

claim 2

, wherein wirings connected to the contacts are disposed in a row direction or a column direction of the picture element array area at predetermined intervals.

5. The solid-state imaging device according to

claim 2

, wherein the contacts are disposed for every n rows (n≧

1) of the picture element array area and the wirings connected to the contacts are disposed for every m columns (m≧

2) of the picture element array area.

6. The solid-state imaging device according to

claim 2

, wherein the wirings connected to the contacts are disposed for every m rows (m≧

2) of the picture element array area and the contacts are disposed for every n columns (n≧

1) of the picture element array area.

7. The solid-state imaging device according to

claim 2

, wherein the plurality of the picture elements are divided to a plurality of picture element groups, the plurality of picture element groups are arranged in the picture element array area at predetermined intervals, and the contacts are disposed between adjacent picture element groups among the plurality of the picture element groups.

8. The solid-state imaging device according to

claim 1

, wherein each of the wirings connected to the contacts is disposed between two control lines for controlling a semiconductor element in the picture element.

9. The solid-state imaging device according to

claim 1

, wherein each of the wirings connected to the contacts is disposed between a control line for controlling a semiconductor element in the picture element and the semiconductor-light receiving region.

10. The solid-state imaging device according to

claim 1

, wherein the contacts are also disposed around the picture element array area of the common well.

19. The solid-state imaging device according to

claim 1

, wherein the plurality of picture elements include color picture elements each provided with a colored layer of a color filter and the well contacts are disposed only in the color picture elements of the same color among the color picture elements of plural colors.

21. The solid-state imaging device according to

claim 1

, wherein the plurality of picture elements include color picture elements each provided with a colored layer of a color filter and the well contacts are disposed only in the color picture elements of the same color among the color picture elements of plural colors, and

wherein a light-receiving area of the color picture element in which the well contact is not disposed is larger than a light-receiving area of the color picture element in which the well contact is disposed.

11. A solid-state imaging device of the amplification type, comprising a plurality of picture elements arranged two-dimensionally each including a photoelectric conversion element and a transistor for amplification,

wherein a semiconductor light-receiving region of a first conductivity type serving as each photoelectric conversion element is disposed in a common well of a second conductivity type in a semiconductor substrate of the first conductivity type,

wherein contacts for supplying a reference voltage to the common well are disposed around a picture element array area of the common well and in each picture element,

wherein a semiconductor region of the first conductivity type serving as a source or drain of each transistor for amplification is disposed in the common well, and

wherein a contact for a power source for supplying, to the semiconductor region, a power source voltage for driving the transistor for amplification is disposed for each picture element.

12. The solid-state imaging device according to

claim 11

, wherein one of the contact and the contact for the power source is connected to a wiring arranged at predetermined intervals in the picture element array area and the other of the contact and the contact for the power source is connected to a shielding layer having a light-receiving window formed above the wiring.

13. The solid-state imaging device according to

claim 12

, wherein the wiring is disposed between two control lines for controlling a semiconductor element inside the picture element.

14. The solid-state imaging device according to

claim 11

, wherein the contacts are connected to wirings for the reference voltage arranged inside the picture element array area at predetermined intervals and the contact for the power source is connected to a shielding layer having a light-receiving window formed above the wiring for the reference voltage.

15. The solid-state imaging device according to

claim 14

, wherein the wiring for the reference voltage is disposed between two control lines for controlling a semiconductor element in the picture element.

16. The solid-state imaging device according to

claim 13

, wherein at least one of the picture elements further includes a transfer gate, a transistor for reset and a transistor for selection, and

wherein the two control lines are two selected from the group consisting of a control line of the transfer gate, a control line of the transistor for reset and a control line of the transistor for selection.

17. The solid-state imaging device according to

claim 11

, wherein at least one of the picture elements further includes a transistor for reset,

wherein a contact for reset for supplying a reference voltage for reset to the transistor for reset is disposed for each picture element provided with the transistor for reset,

wherein any two of the contact, the contact for reset and the contact for the power source are connected to intersecting wirings arranged in the picture element array area, and

wherein the remaining one of the contact, the contact for reset and the contact for the power source is connected to a shielding film having a light-receiving window formed above the wiring.

18. The solid-state imaging device according to

claim 11

, wherein the contact for the power source is connected to a source or a drain of the transistor for selection and supplies the power source voltage to the semiconductor area through the transistor for selection.

20. The solid-state imaging device according to

claim 11

, wherein the plurality of picture elements include color picture elements each provided with a colored layer of a color filter and the well contacts are disposed only in the color picture elements of the same color among the color picture elements of plural colors.

22. The solid-state imaging device according to

claim 11

, wherein the plurality of picture elements include color picture elements each provided with a colored layer of a color filter and the well contacts are disposed only in the color picture elements of the same color among the color picture elements of plural colors, and

wherein a light-receiving area of the color picture element in which the well contact is not disposed is larger than a light-receiving area of the color picture element in which the well contact is disposed.