Contactless IC card system

• US 20010013814A1
• Filed: 12/29/2000
• Published: 08/16/2001
• Est. Priority Date: 06/10/1998
• Status: Active Grant

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Arisawa, Shigeru
• Granted Patent: US 6,586,988 B2
• Time in Patent Office: Days
• US Class Current: 332/115
• CPC Class Codes: G06K 19/0723 the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
• CPC Class Codes: G06K 7/0008 General problems related to the reading of electronic memory record carriers, independent of its reading method, e.g. power transfer
• CPC Class Codes: H03C 1/08 by means of variable impedance element H03C1/28 - H03C1/34, H03C1/46 - H03C1/52, H03C1/62 take precedence
• CPC Class Codes: H03C 1/14 the element being a diode
• CPC Class Codes: H03C 1/36 by means of semiconductor device having at least three electrodes H03C1/34, H03C1/50, H03C1/52, H03C1/62 take precedence
• CPC Class Codes: H03F 2200/327 Amplitude shift keying modulation being used in an amplifying circuit
• CPC Class Codes: H03F 2203/7215 the gated amplifier being switched on or off by a switch at the input of the amplifier
• CPC Class Codes: H03F 3/72 Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
• CPC Class Codes: H03K 7/02 Amplitude modulation, i.e. PAM
• CPC Class Codes: H04L 27/04 Modulator circuits; Transmitter circuits
• CPC Class Codes: H04L 27/06 Demodulator circuits; Receiver circuits

Abstract

In a contactless IC card system, a modulating circuit manufactured in an IC form is operable in a high power efficiency. The demodulating apparatus is arranged by: first signal output means for outputting a first output signal having a predetermined phase with respect to that of an input signal; a second signal output means for outputting a second output signal having a predetermined phase with respect to that of the input signal; gate means for gating at least the second output signal; calculation means for adding, or subtracting the first output signal and the second output signal; and control means for controlling the operation of the gate means in response to a logic level of input data.

Claims

1. A modulating circuit comprising:

first signal output means for outputting a first output signal having a predetermined phase with respect to that of an input signal;

a second signal output means for outputting a second output signal having a predetermined phase with respect to that of said input signal;

gate means for gating at least said second output signal;

calculation means for adding, or subtracting said first output signal and said second output signal; and

control means for controlling the operation of said gate means in response to a logic level of input data.

2. A modulating circuit as claimed in

claim 1

wherein:

said first signal output means outputs said first output signal having the same phase as that of said input signal; and

said second signal output means outputs said second output signal having the phase opposite to that of said input signal.

3. A modulating circuit as claimed in

claim 1

wherein:

said first signal output means power-amplifies said first output signal to output the power-amplified first output signal; and

said second signal output means power-amplifies said second output signal to output the power-amplified second output signal.

4. A modulating circuit as claimed in

claim 1

wherein:

said input signal is constituted by a sine wave signal having a single frequency.

5. A modulating circuit as claimed in

claim 1

wherein:

said input signal is constituted by a rectangular wave signal having a single frequency.

6. A modulating circuit as claimed in

claim 5

wherein:

said second signal output means outputs said second output signal having the phase opposite to that of said input signal by inverting the logic level of said input signal.

7. A modulating circuit as claimed in

claim 3

wherein:

said gate means controls to stop the power amplifying process operation by said second signal output means so as to gate said second output signal; and

said second signal output means maintains an impedance of an output terminal at a high impedance for a time period during which the power amplifying process operation is stopped.

8. A modulating circuit as claimed in

claim 3

wherein:

both said first output signal means and said second output signal means are arranged by a switching circuit for switching operations in response to said input signal.

9. A modulating circuit as claimed in

claim 3

wherein:

at least said second signal output means and said gate means are tri-state buffer circuits.

10. A modulating circuit as claimed in

claim 1

wherein:

said first signal output means outputs said first output signal from a first antenna;

said second signal output means outputs said second output signal from a second antenna; and

said calculation means is formed by way of an electromagnetic coupling between said first antenna and said second antenna.

11. An amplifying circuit in which an operation of a field-effect transistor is switched in response to an input signal so as to output a power-amplified signal of said input signal from said field-effect transistor, comprising:

a drive circuit for switching the operation of said field-effect transistor by applying a voltage to a gate of said field-effect transistor, said voltage being higher than, or equal to a source-to-drain voltage of said field-effect transistor.

12. An amplifying circuit as claimed in

claim 11

wherein:

an output terminal is constituted in such a manner that said output terminal can be set to a high impedance.

13. An amplifying circuit comprising:

first variable resistor means, one end of which is held at a first potential, and the resistance value of which is varied in response to a first control signal;

second variable resistor means, one end of which is connected to the other end of said first variable resistor means, the other end of which is held at a second potential different from said first potential, and the resistance value of which is varied in response to a second control signal; and

control means for switching a signal level of said first control signal and a signal level of said second control signal so as to switch a potential at a connection center point between said first variable resistor means and said second variable resistor means to another potential corresponding to said first and second potentials, and also so as to switch an impedance of said connection center point to a high impedance in response to both an input signal and a control signal.

14. An amplifying circuit as claimed in

claim 13

wherein:

said first variable resistor means and said second variable resistor means are field-effect transistors.

15. An amplifying circuit as claimed in

claim 14

wherein:

said control means switches the signal level of said first control signal and the signal level of said second control signal to a voltage higher than, or equal to a source-to-drain voltage of said field-effect transistor.

16. A transmitter apparatus for amplitude-modulating input data by using a modulating circuit to thereby transmit the amplitude-modulated input data, wherein:

said modulating circuit is comprised of;

first signal output means for outputting a first output signal having a predetermined phase with respect to that of an input signal;

a second signal output means for outputting a second output signal having a predetermined phase with respect to that of said input signal;

gate means for gating at least said second output signal;

calculation means for adding, or subtracting said first output signal and said second output signal; and

control means for controlling the operation of said gate means in response to a logic level of input data.

17. A transmitter apparatus as claimed in

claim 16

wherein:

said first signal output means outputs said first output signal from a first antenna;

said second signal output means outputs said second output signal from a second antenna; and

said calculation means is formed by way of an electromagnetic coupling between said first antenna and said second antenna.

18. A transmitter apparatus for amplitude-modulating input data to thereby transmit the amplitude-modulated input data, comprising:

a first modulating circuit for producing a first amplitude-modulated signal in response to said input data; and

a second modulating circuit for producing a second amplitude-modulated signal made of a carrier wave having a phase opposite to that of said first amplitude-modulated signal;

wherein;

each of said first modulating circuit and said second modulating circuit is comprised of;

first signal output means for outputting a first output signal having a predetermined phase with respect to that of an input signal;

a second signal output means for outputting a second output signal having a predetermined phase with respect to that of said input signal;

gate means for gating at least said second output signal;

calculation means for adding, or subtracting said first output signal and said second output signal; and

control means for controlling the operation of said gate means in response to a logic level of input data.

19. A modulating circuit comprising:

a variable attenuator provided at an output terminal of a power amplifying circuit, for attenuating a power-amplified result of said power amplifying circuit in response to an input signal.

20. A modulating circuit as claimed in

claim 19

wherein:

the signal amplified by said power amplifying circuit is constituted by a sine wave signal having a single frequency.

21. A modulating circuit as claimed in

claim 19

wherein:

the signal amplified by said power amplifying circuit is constituted by a rectangular wave signal having a single frequency.

22. A transmitter apparatus comprising a modulating circuit by way of an amplitude modulation, wherein:

said modulating circuit is comprised of;

a variable attenuator provided at an output terminal of a power amplifying circuit, for attenuating a power-amplified result of said power amplifying circuit in response to an input signal.

23. A transmitter apparatus for amplitude-modulating an input signal to thereby transmit the amplitude-modulated input signal, comprising:

a first modulating circuit for producing a first amplitude-modulated signal in response to said input signal; and

a second modulating circuit for producing a second amplitude-modulated signal made of a carrier wave having a phase opposite to that of said first amplitude-modulated signal in response to said input signal;

wherein;

each of said first modulating circuit and said second modulating circuit is comprised of;

a variable attenuator provided at an output terminal of a power amplifying circuit, for attenuating a power-amplified result of said power amplifying circuit in response to an input signal.

24. A demodulating circuit comprising:

amplifying means for amplifying an input signal;

bias means for biasing said input signal; and

band limiting means for removing a component of said input signal from the output signal derived from said amplifying means.

25. A demodulating circuit as claimed in

claim 24

wherein:

said amplifying means corresponds to any one of an amplifying circuit with employment of a transistor, another amplifying circuit with employment of a field-effect transistor, and a differential amplifier circuit.

26. A demodulating circuit as claimed in

claim 24

wherein:

said band limiting means corresponds to any one of a low-pass filter, a band-pass filter, and a trap filter.

27. A receiver apparatus for demodulating sequentially-entered amplitude-modulated signals by using a demodulating circuit, wherein:

said demodulating circuit is comprised of;

amplifying means for amplifying said amplitude-modulated signal;

bias means for biasing said amplitude-modulated signal; and

band limiting means for removing a component of said amplitude-modulating signal from the output signal derived from said amplifying means.

28. A demodulating circuit comprising:

a limiter for limiting an amplitude of an input signal; and

band limiting means for removing a component of said input signal from the output signal derived from said limiter.

29. A demodulating circuit as claimed in

claim 28

wherein:

said limiter is constituted by a series circuit formed by connecting a diode in series to a constant voltage power source.

30. A demodulating circuit as claimed in

claim 28

wherein:

said band limiting means corresponds to any one of a low-pass filter, a band-pass filter, and a trap filter.

31. A receiver apparatus for demodulating sequentially-entered amplitude-modulated signals by using a demodulating circuit, wherein:

said demodulating circuit is comprised of;

a limiter for limiting the amplitude of said amplitude-modulated signal; and

band limiting means for removing a component of said amplitude-modulated signal from the output signal of said limiter.

32. A demodulating circuit comprising:

clamping means for clamping an input signal; and

band limiting means for removing a component of said input signal from the output signal of said clamping means.

33. A demodulating circuit as claimed in

claim 32

wherein:

said clamping means is constituted by a grounded type diode.

34. A demodulating circuit as claimed in

claim 32

wherein:

said band limiting means corresponds to any one of a low-pass filter, a band-pass filter, and a trap filter.

35. A receiver apparatus for demodulating sequentially-entered amplitude-modulated signals by using a demodulating circuit, wherein:

said demodulating circuit is comprised of;

clamping means for clamping said amplitude-modulated signal; and

band limiting means for removing a component of said amplitude-modulated signal from the output signal of said clamping means.

36. A demodulating circuit comprising:

signal processing means for producing first and second input signals having phases different from a phase of an input signal by approximately 180 degrees;

first clamping circuit for clamping said first input signal;

second clamping circuit for clamping said second input signal;

first band limiting means for removing a component of said first input signal from the output signal of said first clamping circuit;

second band limiting means for removing a component of said second input signal from the output signal of said first clamping means; and

calculating means for adding, or averaging the output signal of said first band limiting means and the output signal of said second band limiting means.

37. A demodulating circuit as claimed in

claim 36

wherein:

said first and second clamping means are constituted by a grounded type diode.

38. A demodulating circuit as claimed in

claim 36

wherein:

said band limiting means corresponds to any one of a low-pass filter, a band-pass filter, and a trap filter.

39. A receiver apparatus for demodulating sequentially-entered amplitude-modulated signals by using a demodulating circuit, wherein:

said demodulating circuit is comprised of;

signal processing means for producing first and second amplitude-modulated signals having phases different from a phase of said amplitude-modulated signal by approximately 180 degrees;

first clamping circuit for clamping said first amplitude-modulated signal;

second clamping circuit for clamping said second amplitude-modulated signal;

first band limiting means for removing a component of said first amplitude-modulated signal from the output signal of said first clamping circuit;

second band limiting means for removing a component of said second amplitude-modulated signal from the output signal of said first clamping means; and

calculating means for adding, or averaging the output signal of said first band limiting means and the output signal of said second band limiting means.

40. A demodulating circuit comprising:

signal processing means for producing first and second input signals having phases different from a phase of an input signal by approximately 180 degrees;

first clamping circuit for clamping said first input signal;

second clamping circuit for clamping said second input signal;

calculating means for adding, or averaging the output signal of said first band limiting means and the output signal of said second band limiting means; and

band limiting means for removing a component of said input signal from the output signal of said calculating means.

41. A demodulating circuit as claimed in

claim 40

wherein:

said first and second clamping means are constituted by a grounded type diode.

42. A demodulating circuit as claimed in

claim 40

wherein:

said band limiting means corresponds to any one of a low-pass filter, a band-pass filter, and a trap filter.

43. A receiver apparatus for demodulating sequentially-entered amplitude-modulated signals by using a demodulating circuit, wherein:

said demodulating circuit is comprised of;

signal processing means for producing first and second amplitude-modulated signals having phases different from a phase of said amplitude-modulated signal by approximately 180 degrees;

first clamping circuit for clamping said first amplitude-modulated signal;

second clamping circuit for clamping said second amplitude-modulated signal;

calculating means for adding, or averaging the output signal of said first band limiting means and the output signal of said second band limiting means; and

band limiting means for removing a component of said amplitude-modulated signal from the output signal of said calculating means.

44. A demodulating circuit comprising:

polarity judging means for judging a polarity of an amplitude-modulated signal to thereby output a polarity judgement result;

multiplying means for multiplying said polarity judgement result by said amplitude-modulated signal to thereby output a multiplication result; and

band limiting means for removing a component of said amplitude-modulated signal from said multiplication result.

45. A demodulating circuit as claimed in

claim 44

wherein:

said polarity judging means is constituted by a limiter for limiting the amplitude of said amplitude-modulated signal on a positive side and on a negative side.

46. A demodulating circuit as claimed in

claim 44

wherein:

said multiplying means is constructed of a double balanced mixer.

47. A demodulating circuit as claimed in

claim 44

wherein:

said band limiting means corresponds to any one of a low-pass filter, a band-pass filter, and a trap filter.

48. A receiver apparatus for demodulating sequentially-entered amplitude-modulated signals by using a demodulating circuit, wherein:

said demodulating circuit is comprised of;

polarity judging means for judging a polarity of an amplitude-modulated signal to thereby output a polarity judgement result;

multiplying means for multiplying said polarity judgement result by said amplitude-modulated signal to thereby output a multiplication result; and

band limiting means for removing a component of said amplitude-modulated signal from said multiplication result.

49. A demodulating circuit comprising:

signal producing means for producing first and second amplitude-modulated signals having phases inverted from each other from an amplitude-modulated signal;

polarity judging means for judging a polarity of one of said amplitude-modulated signal, said first amplitude-modulated signal, and said second amplitude-modulated signal to thereby output a polarity judgement result;

selecting/outputting means for selectively outputting said first amplitude-modulated signal and said second amplitude-modulated signal based upon said polarity judgement result; and

band limiting means for removing a component of said amplitude-modulated signal from the output signal of said selecting/outputting means.

50. A demodulating circuit as claimed in

claim 49

wherein:

said band limiting means corresponds to any one of a low-pass filter, a band-pass filter, and a trap filter.

51. A receiver apparatus for demodulating sequentially-entered amplitude-modulated signals by using a demodulating circuit, wherein:

said demodulating circuit is comprised of;

signal producing means for producing first and second amplitude-modulated signals having phases inverted from each other from an amplitude-modulated signal;

polarity judging means for judging a polarity of one of said amplitude-modulated signal, said first amplitude-modulated signal, and said second amplitude-modulated signal to thereby output a polarity judgement result;

selecting/outputting means for selectively outputting said first amplitude-modulated signal and said second amplitude-modulated signal based upon said polarity judgement result; and

band limiting means for removing a component of said amplitude-modulated signal from the output signal of said selecting/outputting means.